PPC [simd]: Implement Simd128ReverseBytes on AIX

Change-Id: Id9c82a83dca73aedd3ce98b648fc195aecb00c90
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2791562Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#73714}

src/codegen/ppc/assembler-ppc.cc

@@ -1873,6 +1873,12 @@ void Assembler::xxspltib(const Simd128Register rt, const Operand& imm) {
   emit(XXSPLTIB | rt.code() * B21 | imm.immediate() * B11 | TX);
 }
 
+void Assembler::xxbrq(const Simd128Register rt, const Simd128Register rb) {
+  int BX = 1;
+  int TX = 1;
+  emit(XXBRQ | rt.code() * B21 | 31 * B16 | rb.code() * B11 | BX * B1 | TX);
+}
+
 // Pseudo instructions.
 void Assembler::nop(int type) {
   Register reg = r0;

src/codegen/ppc/assembler-ppc.h

@@ -1032,6 +1032,7 @@ class Assembler : public AssemblerBase {
   void stxsiwx(const Simd128Register rs, const MemOperand& src);
   void stxvd(const Simd128Register rt, const MemOperand& src);
   void xxspltib(const Simd128Register rt, const Operand& imm);
+  void xxbrq(const Simd128Register rt, const Simd128Register rb);
 
   // Pseudo instructions
 

src/codegen/ppc/constants-ppc.h

@@ -520,7 +520,9 @@ using Instr = uint32_t;
   /* VSX Vector Test for software Square Root Single-Precision */            \
   V(xvtsqrtsp, XVTSQRTSP, 0xF00002A8)                                        \
   /* Vector Splat Immediate Byte */                                          \
-  V(xxspltib, XXSPLTIB, 0xF00002D0)
+  V(xxspltib, XXSPLTIB, 0xF00002D0)                                          \
+  /* Vector Byte-Reverse Quadword */                                         \
+  V(xxbrq, XXBRQ, 0xF000076C)
 
 #define PPC_XX2_OPCODE_LIST(V)  \
   PPC_XX2_OPCODE_A_FORM_LIST(V) \

src/compiler/backend/ppc/instruction-codes-ppc.h

@@ -124,6 +124,7 @@ namespace compiler {
   V(PPC_LoadFloat32)                 \
   V(PPC_LoadDouble)                  \
   V(PPC_LoadSimd128)                 \
+  V(PPC_LoadReverseSimd128RR)        \
   V(PPC_StoreWord8)                  \
   V(PPC_StoreWord16)                 \
   V(PPC_StoreWord32)                 \

src/compiler/backend/ppc/instruction-scheduler-ppc.cc

@@ -325,6 +325,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kPPC_S128Not:
     case kPPC_S128Select:
     case kPPC_S128AndNot:
+    case kPPC_LoadReverseSimd128RR:
       return kNoOpcodeFlags;
 
     case kPPC_LoadWordS8:

src/compiler/backend/ppc/instruction-selector-ppc.cc

@@ -984,9 +984,9 @@ void InstructionSelector::VisitWord32ReverseBytes(Node* node) {
 }
 
 void InstructionSelector::VisitSimd128ReverseBytes(Node* node) {
-  // TODO(miladfar): Implement the ppc selector for reversing SIMD bytes.
-  // Check if the input node is a Load and do a Load Reverse at once.
-  UNIMPLEMENTED();
+  PPCOperandGenerator g(this);
+  Emit(kPPC_LoadReverseSimd128RR, g.DefineAsRegister(node),
+       g.UseRegister(node->InputAt(0)));
 }
 
 void InstructionSelector::VisitInt32Add(Node* node) {

src/diagnostics/ppc/disasm-ppc.cc

@@ -1272,6 +1272,12 @@ void Decoder::DecodeExt5(Instruction* instr) {
 }
 
 void Decoder::DecodeExt6(Instruction* instr) {
+  switch (EXT6 | (instr->BitField(10, 2))) {
+    case XXBRQ: {
+      Format(instr, "xxbrq  'Xt, 'Xb");
+      return;
+    }
+  }
   switch (EXT6 | (instr->BitField(10, 1))) {
     case XXSPLTIB: {
       Format(instr, "xxspltib  'Xt, 'IMM8");