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Commit ebd85d2c authored by Zhao Jiazhong's avatar Zhao Jiazhong Committed by Commit Bot
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[mips][wasm-simd][liftoff] Implement sub 

Port 3e1b6b40
https://crrev.com/c/2101129

Change-Id: Icc7198221f44f52c88b205947665898b6813cd8c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2107247
Auto-Submit: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#66770}
parent cd36155e
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src/wasm/baseline/mips/liftoff-assembler-mips.h
View file @ ebd85d2c
......@@ -1557,6 +1557,14 @@ void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_add");
}
void LiftoffAssembler::emit_f64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f64x2_sub");
}
void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1582,6 +1590,14 @@ void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_add");
}
void LiftoffAssembler::emit_f32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f32x4_sub");
}
void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1607,6 +1623,14 @@ void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i64x2_add");
}
void LiftoffAssembler::emit_i64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i64x2_sub");
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1632,6 +1656,14 @@ void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_add");
}
void LiftoffAssembler::emit_i32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i32x4_sub");
}
void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1666,6 +1698,14 @@ void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_add");
}
void LiftoffAssembler::emit_i16x8_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i16x8_sub");
}
void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1700,6 +1740,14 @@ void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_add");
}
void LiftoffAssembler::emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i8x16_sub");
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
TurboAssembler::Ulw(limit_address, MemOperand(limit_address));
TurboAssembler::Branch(ool_code, ule, sp, Operand(limit_address));
......
src/wasm/baseline/mips64/liftoff-assembler-mips64.h
View file @ ebd85d2c
......@@ -1349,6 +1349,14 @@ void LiftoffAssembler::emit_f64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_add");
}
void LiftoffAssembler::emit_f64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f64x2_sub");
}
void LiftoffAssembler::emit_f32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1374,6 +1382,14 @@ void LiftoffAssembler::emit_f32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_add");
}
void LiftoffAssembler::emit_f32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_f32x4_sub");
}
void LiftoffAssembler::emit_i64x2_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1399,6 +1415,14 @@ void LiftoffAssembler::emit_i64x2_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i64x2_add");
}
void LiftoffAssembler::emit_i64x2_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i64x2_sub");
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1424,6 +1448,14 @@ void LiftoffAssembler::emit_i32x4_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i32x4_add");
}
void LiftoffAssembler::emit_i32x4_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i32x4_sub");
}
void LiftoffAssembler::emit_i16x8_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1458,6 +1490,14 @@ void LiftoffAssembler::emit_i16x8_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i16x8_add");
}
void LiftoffAssembler::emit_i16x8_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i16x8_sub");
}
void LiftoffAssembler::emit_i8x16_splat(LiftoffRegister dst,
LiftoffRegister src) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
......@@ -1492,6 +1532,14 @@ void LiftoffAssembler::emit_i8x16_add(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_i8x16_add");
}
void LiftoffAssembler::emit_i8x16_sub(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) {
// TODO(mips): Support this on loongson 3a4000. Currently, the main MIPS
// CPU, Loongson 3a3000 does not support MSA(simd128), but the upcoming
// 3a4000 support MSA.
bailout(kSimd, "emit_i8x16_sub");
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
TurboAssembler::Uld(limit_address, MemOperand(limit_address));
TurboAssembler::Branch(ool_code, ule, sp, Operand(limit_address));
......
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