Commit ebb0f9e5 authored by chunyang.dai's avatar chunyang.dai Committed by Commit bot

X87: enable the X87 turbofan support.

    This patch includes the following changes.
     1, Enable the turbofan backend support for X87 platform. It depends on previous CL: 3fdfebd2.
     2, Enable the test cases which are disabled because turbofan for X87 was not enabled.

BUG=v8:4135
LOG=N

Review URL: https://codereview.chromium.org/1179763004

Cr-Commit-Position: refs/heads/master@{#29049}
parent 8e1c3a75
...@@ -21,6 +21,8 @@ ...@@ -21,6 +21,8 @@
#include "src/compiler/x64/instruction-codes-x64.h" #include "src/compiler/x64/instruction-codes-x64.h"
#elif V8_TARGET_ARCH_PPC #elif V8_TARGET_ARCH_PPC
#include "src/compiler/ppc/instruction-codes-ppc.h" #include "src/compiler/ppc/instruction-codes-ppc.h"
#elif V8_TARGET_ARCH_X87
#include "src/compiler/x87/instruction-codes-x87.h"
#else #else
#define TARGET_ARCH_OPCODE_LIST(V) #define TARGET_ARCH_OPCODE_LIST(V)
#define TARGET_ADDRESSING_MODE_LIST(V) #define TARGET_ADDRESSING_MODE_LIST(V)
......
weiliang.lin@intel.com
chunyang.dai@intel.com
This diff is collapsed.
// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#ifndef V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_
#define V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_
#include "src/compiler/instruction.h"
#include "src/compiler/instruction-codes.h"
namespace v8 {
namespace internal {
namespace compiler {
// X87-specific opcodes that specify which assembly sequence to emit.
// Most opcodes specify a single instruction.
#define TARGET_ARCH_OPCODE_LIST(V) \
V(X87Add) \
V(X87And) \
V(X87Cmp) \
V(X87Test) \
V(X87Or) \
V(X87Xor) \
V(X87Sub) \
V(X87Imul) \
V(X87ImulHigh) \
V(X87UmulHigh) \
V(X87Idiv) \
V(X87Udiv) \
V(X87Not) \
V(X87Neg) \
V(X87Shl) \
V(X87Shr) \
V(X87Sar) \
V(X87Ror) \
V(X87Lzcnt) \
V(X87Float32Cmp) \
V(X87Float32Add) \
V(X87Float32Sub) \
V(X87Float32Mul) \
V(X87Float32Div) \
V(X87Float32Max) \
V(X87Float32Min) \
V(X87Float32Abs) \
V(X87Float32Sqrt) \
V(X87LoadFloat64Constant) \
V(X87Float64Add) \
V(X87Float64Sub) \
V(X87Float64Mul) \
V(X87Float64Div) \
V(X87Float64Mod) \
V(X87Float64Max) \
V(X87Float64Min) \
V(X87Float64Abs) \
V(X87Int32ToFloat64) \
V(X87Float32ToFloat64) \
V(X87Uint32ToFloat64) \
V(X87Float64ToInt32) \
V(X87Float64ToFloat32) \
V(X87Float64ToUint32) \
V(X87Float64ExtractHighWord32) \
V(X87Float64ExtractLowWord32) \
V(X87Float64InsertHighWord32) \
V(X87Float64InsertLowWord32) \
V(X87Float64Sqrt) \
V(X87Float64Round) \
V(X87Float64Cmp) \
V(X87Movsxbl) \
V(X87Movzxbl) \
V(X87Movb) \
V(X87Movsxwl) \
V(X87Movzxwl) \
V(X87Movw) \
V(X87Movl) \
V(X87Movss) \
V(X87Movsd) \
V(X87Lea) \
V(X87Push) \
V(X87PushFloat64) \
V(X87PushFloat32) \
V(X87StoreWriteBarrier) \
V(X87StackCheck)
// Addressing modes represent the "shape" of inputs to an instruction.
// Many instructions support multiple addressing modes. Addressing modes
// are encoded into the InstructionCode of the instruction and tell the
// code generator after register allocation which assembler method to call.
//
// We use the following local notation for addressing modes:
//
// M = memory operand
// R = base register
// N = index register * N for N in {1, 2, 4, 8}
// I = immediate displacement (int32_t)
#define TARGET_ADDRESSING_MODE_LIST(V) \
V(MR) /* [%r1 ] */ \
V(MRI) /* [%r1 + K] */ \
V(MR1) /* [%r1 + %r2*1 ] */ \
V(MR2) /* [%r1 + %r2*2 ] */ \
V(MR4) /* [%r1 + %r2*4 ] */ \
V(MR8) /* [%r1 + %r2*8 ] */ \
V(MR1I) /* [%r1 + %r2*1 + K] */ \
V(MR2I) /* [%r1 + %r2*2 + K] */ \
V(MR4I) /* [%r1 + %r2*3 + K] */ \
V(MR8I) /* [%r1 + %r2*4 + K] */ \
V(M1) /* [ %r2*1 ] */ \
V(M2) /* [ %r2*2 ] */ \
V(M4) /* [ %r2*4 ] */ \
V(M8) /* [ %r2*8 ] */ \
V(M1I) /* [ %r2*1 + K] */ \
V(M2I) /* [ %r2*2 + K] */ \
V(M4I) /* [ %r2*4 + K] */ \
V(M8I) /* [ %r2*8 + K] */ \
V(MI) /* [ K] */
} // namespace compiler
} // namespace internal
} // namespace v8
#endif // V8_COMPILER_X87_INSTRUCTION_CODES_X87_H_
This diff is collapsed.
// Copyright 2014 the V8 project authors. All rights reserved.
// Use of this source code is governed by a BSD-style license that can be
// found in the LICENSE file.
#include "src/assembler.h"
#include "src/code-stubs.h"
#include "src/compiler/linkage.h"
#include "src/compiler/linkage-impl.h"
#include "src/zone.h"
namespace v8 {
namespace internal {
namespace compiler {
struct X87LinkageHelperTraits {
static Register ReturnValueReg() { return eax; }
static Register ReturnValue2Reg() { return edx; }
static Register JSCallFunctionReg() { return edi; }
static Register ContextReg() { return esi; }
static Register RuntimeCallFunctionReg() { return ebx; }
static Register RuntimeCallArgCountReg() { return eax; }
static RegList CCalleeSaveRegisters() {
return esi.bit() | edi.bit() | ebx.bit();
}
static Register CRegisterParameter(int i) { return no_reg; }
static int CRegisterParametersLength() { return 0; }
};
typedef LinkageHelper<X87LinkageHelperTraits> LH;
CallDescriptor* Linkage::GetJSCallDescriptor(Zone* zone, bool is_osr,
int parameter_count,
CallDescriptor::Flags flags) {
return LH::GetJSCallDescriptor(zone, is_osr, parameter_count, flags);
}
CallDescriptor* Linkage::GetRuntimeCallDescriptor(
Zone* zone, Runtime::FunctionId function, int parameter_count,
Operator::Properties properties) {
return LH::GetRuntimeCallDescriptor(zone, function, parameter_count,
properties);
}
CallDescriptor* Linkage::GetStubCallDescriptor(
Isolate* isolate, Zone* zone, const CallInterfaceDescriptor& descriptor,
int stack_parameter_count, CallDescriptor::Flags flags,
Operator::Properties properties, MachineType return_type) {
return LH::GetStubCallDescriptor(isolate, zone, descriptor,
stack_parameter_count, flags, properties,
return_type);
}
CallDescriptor* Linkage::GetSimplifiedCDescriptor(Zone* zone,
const MachineSignature* sig) {
return LH::GetSimplifiedCDescriptor(zone, sig);
}
} // namespace compiler
} // namespace internal
} // namespace v8
...@@ -32,7 +32,7 @@ ...@@ -32,7 +32,7 @@
#if V8_TARGET_ARCH_IA32 || (V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_32_BIT) || \ #if V8_TARGET_ARCH_IA32 || (V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_32_BIT) || \
V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \ V8_TARGET_ARCH_ARM || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_MIPS || \
V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC V8_TARGET_ARCH_MIPS64 || V8_TARGET_ARCH_PPC || V8_TARGET_ARCH_X87
#define V8_TURBOFAN_BACKEND 1 #define V8_TURBOFAN_BACKEND 1
#else #else
#define V8_TURBOFAN_BACKEND 0 #define V8_TURBOFAN_BACKEND 0
......
...@@ -388,6 +388,14 @@ void Assembler::mov_b(Register dst, const Operand& src) { ...@@ -388,6 +388,14 @@ void Assembler::mov_b(Register dst, const Operand& src) {
} }
void Assembler::mov_b(const Operand& dst, const Immediate& src) {
EnsureSpace ensure_space(this);
EMIT(0xC6);
emit_operand(eax, dst);
EMIT(static_cast<int8_t>(src.x_));
}
void Assembler::mov_b(const Operand& dst, int8_t imm8) { void Assembler::mov_b(const Operand& dst, int8_t imm8) {
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);
EMIT(0xC6); EMIT(0xC6);
...@@ -430,6 +438,16 @@ void Assembler::mov_w(const Operand& dst, int16_t imm16) { ...@@ -430,6 +438,16 @@ void Assembler::mov_w(const Operand& dst, int16_t imm16) {
} }
void Assembler::mov_w(const Operand& dst, const Immediate& src) {
EnsureSpace ensure_space(this);
EMIT(0x66);
EMIT(0xC7);
emit_operand(eax, dst);
EMIT(static_cast<int8_t>(src.x_ & 0xff));
EMIT(static_cast<int8_t>(src.x_ >> 8));
}
void Assembler::mov(Register dst, int32_t imm32) { void Assembler::mov(Register dst, int32_t imm32) {
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);
EMIT(0xB8 | dst.code()); EMIT(0xB8 | dst.code());
...@@ -1698,6 +1716,20 @@ void Assembler::fsub_i(int i) { ...@@ -1698,6 +1716,20 @@ void Assembler::fsub_i(int i) {
} }
void Assembler::fsubr_d(const Operand& adr) {
EnsureSpace ensure_space(this);
EMIT(0xDC);
emit_operand(ebp, adr);
}
void Assembler::fsub_d(const Operand& adr) {
EnsureSpace ensure_space(this);
EMIT(0xDC);
emit_operand(esp, adr);
}
void Assembler::fisub_s(const Operand& adr) { void Assembler::fisub_s(const Operand& adr) {
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);
EMIT(0xDA); EMIT(0xDA);
...@@ -1717,12 +1749,33 @@ void Assembler::fmul(int i) { ...@@ -1717,12 +1749,33 @@ void Assembler::fmul(int i) {
} }
void Assembler::fmul_d(const Operand& adr) {
EnsureSpace ensure_space(this);
EMIT(0xDC);
emit_operand(ecx, adr);
}
void Assembler::fdiv(int i) { void Assembler::fdiv(int i) {
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);
emit_farith(0xDC, 0xF8, i); emit_farith(0xDC, 0xF8, i);
} }
void Assembler::fdiv_d(const Operand& adr) {
EnsureSpace ensure_space(this);
EMIT(0xDC);
emit_operand(esi, adr);
}
void Assembler::fdivr_d(const Operand& adr) {
EnsureSpace ensure_space(this);
EMIT(0xDC);
emit_operand(edi, adr);
}
void Assembler::fdiv_i(int i) { void Assembler::fdiv_i(int i) {
EnsureSpace ensure_space(this); EnsureSpace ensure_space(this);
emit_farith(0xD8, 0xF0, i); emit_farith(0xD8, 0xF0, i);
......
...@@ -273,6 +273,14 @@ inline Condition CommuteCondition(Condition cc) { ...@@ -273,6 +273,14 @@ inline Condition CommuteCondition(Condition cc) {
} }
enum RoundingMode {
kRoundToNearest = 0x0,
kRoundDown = 0x1,
kRoundUp = 0x2,
kRoundToZero = 0x3
};
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Immediates // Machine instruction Immediates
...@@ -620,11 +628,14 @@ class Assembler : public AssemblerBase { ...@@ -620,11 +628,14 @@ class Assembler : public AssemblerBase {
void mov_b(Register dst, const Operand& src); void mov_b(Register dst, const Operand& src);
void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); } void mov_b(Register dst, int8_t imm8) { mov_b(Operand(dst), imm8); }
void mov_b(const Operand& dst, int8_t imm8); void mov_b(const Operand& dst, int8_t imm8);
void mov_b(const Operand& dst, const Immediate& src);
void mov_b(const Operand& dst, Register src); void mov_b(const Operand& dst, Register src);
void mov_w(Register dst, const Operand& src); void mov_w(Register dst, const Operand& src);
void mov_w(const Operand& dst, Register src); void mov_w(const Operand& dst, Register src);
void mov_w(const Operand& dst, int16_t imm16); void mov_w(const Operand& dst, int16_t imm16);
void mov_w(const Operand& dst, const Immediate& src);
void mov(Register dst, int32_t imm32); void mov(Register dst, int32_t imm32);
void mov(Register dst, const Immediate& x); void mov(Register dst, const Immediate& x);
...@@ -886,15 +897,21 @@ class Assembler : public AssemblerBase { ...@@ -886,15 +897,21 @@ class Assembler : public AssemblerBase {
void fadd_d(const Operand& adr); void fadd_d(const Operand& adr);
void fsub(int i); void fsub(int i);
void fsub_i(int i); void fsub_i(int i);
void fsub_d(const Operand& adr);
void fsubr_d(const Operand& adr);
void fmul(int i); void fmul(int i);
void fmul_d(const Operand& adr);
void fmul_i(int i); void fmul_i(int i);
void fdiv(int i); void fdiv(int i);
void fdiv_d(const Operand& adr);
void fdivr_d(const Operand& adr);
void fdiv_i(int i); void fdiv_i(int i);
void fisub_s(const Operand& adr); void fisub_s(const Operand& adr);
void faddp(int i = 1); void faddp(int i = 1);
void fsubp(int i = 1); void fsubp(int i = 1);
void fsubr(int i = 1);
void fsubrp(int i = 1); void fsubrp(int i = 1);
void fmulp(int i = 1); void fmulp(int i = 1);
void fdivp(int i = 1); void fdivp(int i = 1);
......
...@@ -726,6 +726,21 @@ int DisassemblerX87::MemoryFPUInstruction(int escape_opcode, ...@@ -726,6 +726,21 @@ int DisassemblerX87::MemoryFPUInstruction(int escape_opcode,
case 0: case 0:
mnem = "fadd_d"; mnem = "fadd_d";
break; break;
case 1:
mnem = "fmul_d";
break;
case 4:
mnem = "fsub_d";
break;
case 5:
mnem = "fsubr_d";
break;
case 6:
mnem = "fdiv_d";
break;
case 7:
mnem = "fdivr_d";
break;
default: default:
UnimplementedInstruction(); UnimplementedInstruction();
} }
......
...@@ -744,9 +744,11 @@ void MacroAssembler::X87SetRC(int rc) { ...@@ -744,9 +744,11 @@ void MacroAssembler::X87SetRC(int rc) {
void MacroAssembler::X87SetFPUCW(int cw) { void MacroAssembler::X87SetFPUCW(int cw) {
RecordComment("-- X87SetFPUCW start --");
push(Immediate(cw)); push(Immediate(cw));
fldcw(MemOperand(esp, 0)); fldcw(MemOperand(esp, 0));
add(esp, Immediate(kPointerSize)); add(esp, Immediate(kPointerSize));
RecordComment("-- X87SetFPUCW end--");
} }
......
...@@ -301,12 +301,7 @@ ...@@ -301,12 +301,7 @@
############################################################################## ##############################################################################
['arch == x87', { ['arch == x87', {
'test-run-machops/RunFloat64InsertLowWord32': [SKIP]
# Test requires turbofan:
'codegen-tester/CompareWrapper': [SKIP],
'codegen-tester/ParametersEqual': [SKIP],
'test-simplified-lowering/LowerStringOps_to_call_and_compare': [SKIP],
'test-serialize/SerializeInternalReference': [FAIL],
}], # 'arch == x87' }], # 'arch == x87'
############################################################################## ##############################################################################
......
...@@ -30,12 +30,4 @@ ...@@ -30,12 +30,4 @@
# All tests in the bug directory are expected to fail. # All tests in the bug directory are expected to fail.
'bugs/*': [FAIL], 'bugs/*': [FAIL],
}], # ALWAYS }], # ALWAYS
##############################################################################
['arch == x87', {
# Crankshaft compiler did not generate required source position for it:
'overwritten-builtins': [SKIP],
'strong-object-set-proto': [SKIP],
}], # 'arch == x87'
] ]
...@@ -639,12 +639,6 @@ ...@@ -639,12 +639,6 @@
'harmony/symbols': [SKIP], 'harmony/symbols': [SKIP],
}], # 'arch == nacl_ia32 or arch == nacl_x64' }], # 'arch == nacl_ia32 or arch == nacl_x64'
##############################################################################
['arch == x87', {
# Currently Turbofan is not supported by x87.
'compiler/opt-next-call-turbo': [SKIP],
}], # 'arch == x87'
############################################################################## ##############################################################################
['deopt_fuzzer == True', { ['deopt_fuzzer == True', {
......
...@@ -1110,6 +1110,10 @@ ...@@ -1110,6 +1110,10 @@
'../../src/x87/macro-assembler-x87.h', '../../src/x87/macro-assembler-x87.h',
'../../src/x87/regexp-macro-assembler-x87.cc', '../../src/x87/regexp-macro-assembler-x87.cc',
'../../src/x87/regexp-macro-assembler-x87.h', '../../src/x87/regexp-macro-assembler-x87.h',
'../../src/compiler/x87/code-generator-x87.cc',
'../../src/compiler/x87/instruction-codes-x87.h',
'../../src/compiler/x87/instruction-selector-x87.cc',
'../../src/compiler/x87/linkage-x87.cc',
'../../src/ic/x87/access-compiler-x87.cc', '../../src/ic/x87/access-compiler-x87.cc',
'../../src/ic/x87/handler-compiler-x87.cc', '../../src/ic/x87/handler-compiler-x87.cc',
'../../src/ic/x87/ic-x87.cc', '../../src/ic/x87/ic-x87.cc',
......
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