s390x: Fix LGRL offset handling

Change-Id: If03e71b1da25740aaf4530e74c36fe5a28f70fe3
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3216037Reviewed-by: Milad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/main@{#77364}

src/codegen/s390/assembler-s390.cc

@@ -486,7 +486,7 @@ int Assembler::target_at(int pos) {
              BRASL == opcode || LGRL == opcode) {
     int32_t imm32 =
         static_cast<int32_t>(instr & (static_cast<uint64_t>(0xFFFFFFFF)));
-    if (LLILF != opcode && LGRL != opcode)
+    if (LLILF != opcode)
       imm32 <<= 1;  // BR* + LARL treat immediate in # of halfwords
     if (imm32 == 0) return kEndOfChain;
     return pos + imm32;
@@ -521,18 +521,13 @@ void Assembler::target_at_put(int pos, int target_pos, bool* is_branch) {
     DCHECK(is_int16(imm16));
     instr_at_put<FourByteInstr>(pos, instr | (imm16 >> 1));
     return;
-  } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) {
+  } else if (BRCL == opcode || LARL == opcode || BRASL == opcode ||
+             LGRL == opcode) {
     // Immediate is in # of halfwords
     int32_t imm32 = target_pos - pos;
     instr &= (~static_cast<uint64_t>(0xFFFFFFFF));
     instr_at_put<SixByteInstr>(pos, instr | (imm32 >> 1));
     return;
-  } else if (LGRL == opcode) {
-    // Immediate is in # of bytes
-    int32_t imm32 = target_pos - pos;
-    instr &= (~static_cast<uint64_t>(0xFFFFFFFF));
-    instr_at_put<SixByteInstr>(pos, instr | imm32);
-    return;
   } else if (LLILF == opcode) {
     DCHECK(target_pos == kEndOfChain || target_pos >= 0);
     // Emitted label constant, not part of a branch.

src/execution/s390/simulator-s390.cc

@@ -6715,7 +6715,7 @@ EVALUATE(STHRL) {
 EVALUATE(LGRL) {
   DCHECK_OPCODE(LGRL);
   DECODE_RIL_B_INSTRUCTION(r1, i2);
-  intptr_t offset = i2;
+  intptr_t offset = i2 * 2;
   int64_t mem_val = ReadDW(get_pc() + offset);
   set_register(r1, mem_val);
   return length;