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Commit e7be85da authored by bjaideep's avatar bjaideep Committed by Commit bot
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PPC/s390: [assembler] Make register definitions constexpr 

Port e82b7ccd

Original Commit Message:

    I originally needed this for the initialization of a constexpr array in
    the wasm lazy compile builtin, but since it's a bigger change, I now
    split it off as this separate CL.
    The style guide recommends constexpr over const. I thus apply the
    constexprificaton over all headers that I touched anyway.

    I also remove the ARM64_DEFINE_REG_STATICS hack. It was introduced when
    merging in arm64 support more than three years ago, and I don't see the
    purpose for this.
    Also, some #defines can now be constexpr definitions, which was not
    possible before according to the comment.

R=clemensh@chromium.org, joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com
BUG=
LOG=N

Review-Url: https://codereview.chromium.org/2733323003
Cr-Commit-Position: refs/heads/master@{#43678}
parent cb3f1376
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Showing with 113 additions and 119 deletions
src/ppc/assembler-ppc.h
View file @ e7be85da
...@@ -149,16 +149,16 @@ struct Register { ...@@ -149,16 +149,16 @@ struct Register {
kCode_no_reg = -1 kCode_no_reg = -1
}; };
static const int kNumRegisters = Code::kAfterLast; static constexpr int kNumRegisters = Code::kAfterLast;
#define REGISTER_COUNT(R) 1 + #define REGISTER_COUNT(R) 1 +
static const int kNumAllocatable = static constexpr int kNumAllocatable =
ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT)0; ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT) 0;
#undef REGISTER_COUNT #undef REGISTER_COUNT
#define REGISTER_BIT(R) 1 << kCode_##R | #define REGISTER_BIT(R) 1 << kCode_##R |
static const RegList kAllocatable = static constexpr RegList kAllocatable =
ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT)0; ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT) 0;
#undef REGISTER_BIT #undef REGISTER_BIT
static Register from_code(int code) { static Register from_code(int code) {
...@@ -183,30 +183,30 @@ struct Register { ...@@ -183,30 +183,30 @@ struct Register {
} }
#if V8_TARGET_LITTLE_ENDIAN #if V8_TARGET_LITTLE_ENDIAN
static const int kMantissaOffset = 0; static constexpr int kMantissaOffset = 0;
static const int kExponentOffset = 4; static constexpr int kExponentOffset = 4;
#else #else
static const int kMantissaOffset = 4; static constexpr int kMantissaOffset = 4;
static const int kExponentOffset = 0; static constexpr int kExponentOffset = 0;
#endif #endif
// Unfortunately we can't make this private in a struct. // Unfortunately we can't make this private in a struct.
int reg_code; int reg_code;
}; };
#define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; #define DEFINE_REGISTER(R) constexpr Register R = {Register::kCode_##R};
GENERAL_REGISTERS(DECLARE_REGISTER) GENERAL_REGISTERS(DEFINE_REGISTER)
#undef DECLARE_REGISTER #undef DEFINE_REGISTER
const Register no_reg = {Register::kCode_no_reg}; constexpr Register no_reg = {Register::kCode_no_reg};
// Aliases // Aliases
const Register kLithiumScratch = r11; // lithium scratch. constexpr Register kLithiumScratch = r11; // lithium scratch.
const Register kConstantPoolRegister = r28; // Constant pool. constexpr Register kConstantPoolRegister = r28; // Constant pool.
const Register kRootRegister = r29; // Roots array pointer. constexpr Register kRootRegister = r29; // Roots array pointer.
const Register cp = r30; // JavaScript context pointer. constexpr Register cp = r30; // JavaScript context pointer.
static const bool kSimpleFPAliasing = true; constexpr bool kSimpleFPAliasing = true;
static const bool kSimdMaskRegisters = false; constexpr bool kSimdMaskRegisters = false;
// Double word FP register. // Double word FP register.
struct DoubleRegister { struct DoubleRegister {
...@@ -218,8 +218,8 @@ struct DoubleRegister { ...@@ -218,8 +218,8 @@ struct DoubleRegister {
kCode_no_reg = -1 kCode_no_reg = -1
}; };
static const int kNumRegisters = Code::kAfterLast; static constexpr int kNumRegisters = Code::kAfterLast;
static const int kMaxNumRegisters = kNumRegisters; static constexpr int kMaxNumRegisters = kNumRegisters;
bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; }
bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; }
...@@ -245,19 +245,16 @@ typedef DoubleRegister FloatRegister; ...@@ -245,19 +245,16 @@ typedef DoubleRegister FloatRegister;
// TODO(ppc) Define SIMD registers. // TODO(ppc) Define SIMD registers.
typedef DoubleRegister Simd128Register; typedef DoubleRegister Simd128Register;
#define DECLARE_REGISTER(R) \ #define DEFINE_REGISTER(R) \
const DoubleRegister R = {DoubleRegister::kCode_##R}; constexpr DoubleRegister R = {DoubleRegister::kCode_##R};
DOUBLE_REGISTERS(DECLARE_REGISTER) DOUBLE_REGISTERS(DEFINE_REGISTER)
#undef DECLARE_REGISTER #undef DEFINE_REGISTER
const Register no_dreg = {Register::kCode_no_reg}; constexpr Register no_dreg = {Register::kCode_no_reg};
// Aliases for double registers. Defined using #define instead of constexpr DoubleRegister kFirstCalleeSavedDoubleReg = d14;
// "static const DoubleRegister&" because Clang complains otherwise when a constexpr DoubleRegister kLastCalleeSavedDoubleReg = d31;
// compilation unit that includes this header doesn't use the variables. constexpr DoubleRegister kDoubleRegZero = d14;
#define kFirstCalleeSavedDoubleReg d14 constexpr DoubleRegister kScratchDoubleReg = d13;
#define kLastCalleeSavedDoubleReg d31
#define kDoubleRegZero d14
#define kScratchDoubleReg d13
Register ToRegister(int num); Register ToRegister(int num);
...@@ -278,25 +275,24 @@ struct CRegister { ...@@ -278,25 +275,24 @@ struct CRegister {
int reg_code; int reg_code;
}; };
constexpr CRegister no_creg = {-1};
const CRegister no_creg = {-1}; constexpr CRegister cr0 = {0};
constexpr CRegister cr1 = {1};
const CRegister cr0 = {0}; constexpr CRegister cr2 = {2};
const CRegister cr1 = {1}; constexpr CRegister cr3 = {3};
const CRegister cr2 = {2}; constexpr CRegister cr4 = {4};
const CRegister cr3 = {3}; constexpr CRegister cr5 = {5};
const CRegister cr4 = {4}; constexpr CRegister cr6 = {6};
const CRegister cr5 = {5}; constexpr CRegister cr7 = {7};
const CRegister cr6 = {6};
const CRegister cr7 = {7};
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Operands // Machine instruction Operands
#if V8_TARGET_ARCH_PPC64 #if V8_TARGET_ARCH_PPC64
const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64; constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64;
#else #else
const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32; constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32;
#endif #endif
// Class Operand represents a shifter operand in data processing instructions // Class Operand represents a shifter operand in data processing instructions
...@@ -495,7 +491,7 @@ class Assembler : public AssemblerBase { ...@@ -495,7 +491,7 @@ class Assembler : public AssemblerBase {
RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE); RelocInfo::Mode mode = RelocInfo::INTERNAL_REFERENCE);
// Size of an instruction. // Size of an instruction.
static const int kInstrSize = sizeof(Instr); static constexpr int kInstrSize = sizeof(Instr);
// Here we are patching the address in the LUI/ORI instruction pair. // Here we are patching the address in the LUI/ORI instruction pair.
// These values are used in the serialization process and must be zero for // These values are used in the serialization process and must be zero for
...@@ -503,25 +499,25 @@ class Assembler : public AssemblerBase { ...@@ -503,25 +499,25 @@ class Assembler : public AssemblerBase {
// are split across two consecutive instructions and don't exist separately // are split across two consecutive instructions and don't exist separately
// in the code, so the serializer should not step forwards in memory after // in the code, so the serializer should not step forwards in memory after
// a target is resolved and written. // a target is resolved and written.
static const int kSpecialTargetSize = 0; static constexpr int kSpecialTargetSize = 0;
// Number of instructions to load an address via a mov sequence. // Number of instructions to load an address via a mov sequence.
#if V8_TARGET_ARCH_PPC64 #if V8_TARGET_ARCH_PPC64
static const int kMovInstructionsConstantPool = 1; static constexpr int kMovInstructionsConstantPool = 1;
static const int kMovInstructionsNoConstantPool = 5; static constexpr int kMovInstructionsNoConstantPool = 5;
#if defined(V8_PPC_TAGGING_OPT) #if defined(V8_PPC_TAGGING_OPT)
static const int kTaggedLoadInstructions = 1; static constexpr int kTaggedLoadInstructions = 1;
#else #else
static const int kTaggedLoadInstructions = 2; static constexpr int kTaggedLoadInstructions = 2;
#endif #endif
#else #else
static const int kMovInstructionsConstantPool = 1; static constexpr int kMovInstructionsConstantPool = 1;
static const int kMovInstructionsNoConstantPool = 2; static constexpr int kMovInstructionsNoConstantPool = 2;
static const int kTaggedLoadInstructions = 1; static constexpr int kTaggedLoadInstructions = 1;
#endif #endif
static const int kMovInstructions = FLAG_enable_embedded_constant_pool static constexpr int kMovInstructions = FLAG_enable_embedded_constant_pool
? kMovInstructionsConstantPool ? kMovInstructionsConstantPool
: kMovInstructionsNoConstantPool; : kMovInstructionsNoConstantPool;
// Distance between the instruction referring to the address of the call // Distance between the instruction referring to the address of the call
// target and the return address. // target and the return address.
...@@ -531,7 +527,7 @@ class Assembler : public AssemblerBase { ...@@ -531,7 +527,7 @@ class Assembler : public AssemblerBase {
// mtlr r8 // mtlr r8
// blrl // blrl
// @ return address // @ return address
static const int kCallTargetAddressOffset = static constexpr int kCallTargetAddressOffset =
(kMovInstructions + 2) * kInstrSize; (kMovInstructions + 2) * kInstrSize;
// Distance between start of patched debug break slot and the emitted address // Distance between start of patched debug break slot and the emitted address
...@@ -540,13 +536,13 @@ class Assembler : public AssemblerBase { ...@@ -540,13 +536,13 @@ class Assembler : public AssemblerBase {
// mov r0, <address> // mov r0, <address>
// mtlr r0 // mtlr r0
// blrl // blrl
static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; static constexpr int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize;
// This is the length of the code sequence from SetDebugBreakAtSlot() // This is the length of the code sequence from SetDebugBreakAtSlot()
// FIXED_SEQUENCE // FIXED_SEQUENCE
static const int kDebugBreakSlotInstructions = static constexpr int kDebugBreakSlotInstructions =
kMovInstructionsNoConstantPool + 2; kMovInstructionsNoConstantPool + 2;
static const int kDebugBreakSlotLength = static constexpr int kDebugBreakSlotLength =
kDebugBreakSlotInstructions * kInstrSize; kDebugBreakSlotInstructions * kInstrSize;
static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) { static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) {
...@@ -1379,7 +1375,7 @@ class Assembler : public AssemblerBase { ...@@ -1379,7 +1375,7 @@ class Assembler : public AssemblerBase {
// the generated instructions. This is so that multi-instruction sequences do // the generated instructions. This is so that multi-instruction sequences do
// not have to check for overflow. The same is true for writes of large // not have to check for overflow. The same is true for writes of large
// relocation info entries. // relocation info entries.
static const int kGap = 32; static constexpr int kGap = 32;
// Repeated checking whether the trampoline pool should be emitted is rather // Repeated checking whether the trampoline pool should be emitted is rather
// expensive. By default we only check again once a number of instructions // expensive. By default we only check again once a number of instructions
...@@ -1395,7 +1391,7 @@ class Assembler : public AssemblerBase { ...@@ -1395,7 +1391,7 @@ class Assembler : public AssemblerBase {
// Relocation info generation // Relocation info generation
// Each relocation is encoded as a variable size value // Each relocation is encoded as a variable size value
static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; static constexpr int kMaxRelocSize = RelocInfoWriter::kMaxSize;
RelocInfoWriter reloc_info_writer; RelocInfoWriter reloc_info_writer;
std::vector<DeferredRelocInfo> relocations_; std::vector<DeferredRelocInfo> relocations_;
...@@ -1473,10 +1469,10 @@ class Assembler : public AssemblerBase { ...@@ -1473,10 +1469,10 @@ class Assembler : public AssemblerBase {
// trigger different mode of branch instruction generation, where we // trigger different mode of branch instruction generation, where we
// no longer use a single branch instruction. // no longer use a single branch instruction.
bool trampoline_emitted_; bool trampoline_emitted_;
static const int kTrampolineSlotsSize = kInstrSize; static constexpr int kTrampolineSlotsSize = kInstrSize;
static const int kMaxCondBranchReach = (1 << (16 - 1)) - 1; static constexpr int kMaxCondBranchReach = (1 << (16 - 1)) - 1;
static const int kMaxBlockTrampolineSectionSize = 64 * kInstrSize; static constexpr int kMaxBlockTrampolineSectionSize = 64 * kInstrSize;
static const int kInvalidSlotPos = -1; static constexpr int kInvalidSlotPos = -1;
Trampoline trampoline_; Trampoline trampoline_;
bool internal_trampoline_exception_; bool internal_trampoline_exception_;
......
src/s390/assembler-s390.h
View file @ e7be85da
...@@ -127,15 +127,15 @@ struct Register { ...@@ -127,15 +127,15 @@ struct Register {
kAfterLast, kAfterLast,
kCode_no_reg = -1 kCode_no_reg = -1
}; };
static const int kNumRegisters = Code::kAfterLast; static constexpr int kNumRegisters = Code::kAfterLast;
#define REGISTER_COUNT(R) 1 + #define REGISTER_COUNT(R) 1 +
static const int kNumAllocatable = static constexpr int kNumAllocatable =
ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT) 0; ALLOCATABLE_GENERAL_REGISTERS(REGISTER_COUNT) 0;
#undef REGISTER_COUNT #undef REGISTER_COUNT
#define REGISTER_BIT(R) 1 << kCode_##R | #define REGISTER_BIT(R) 1 << kCode_##R |
static const RegList kAllocatable = static constexpr RegList kAllocatable =
ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT) 0; ALLOCATABLE_GENERAL_REGISTERS(REGISTER_BIT) 0;
#undef REGISTER_BIT #undef REGISTER_BIT
...@@ -163,11 +163,11 @@ struct Register { ...@@ -163,11 +163,11 @@ struct Register {
} }
#if V8_TARGET_LITTLE_ENDIAN #if V8_TARGET_LITTLE_ENDIAN
static const int kMantissaOffset = 0; static constexpr int kMantissaOffset = 0;
static const int kExponentOffset = 4; static constexpr int kExponentOffset = 4;
#else #else
static const int kMantissaOffset = 4; static constexpr int kMantissaOffset = 4;
static const int kExponentOffset = 0; static constexpr int kExponentOffset = 0;
#endif #endif
// Unfortunately we can't make this private in a struct. // Unfortunately we can't make this private in a struct.
...@@ -176,18 +176,18 @@ struct Register { ...@@ -176,18 +176,18 @@ struct Register {
typedef struct Register Register; typedef struct Register Register;
#define DECLARE_REGISTER(R) const Register R = {Register::kCode_##R}; #define DEFINE_REGISTER(R) constexpr Register R = {Register::kCode_##R};
GENERAL_REGISTERS(DECLARE_REGISTER) GENERAL_REGISTERS(DEFINE_REGISTER)
#undef DECLARE_REGISTER #undef DEFINE_REGISTER
const Register no_reg = {Register::kCode_no_reg}; constexpr Register no_reg = {Register::kCode_no_reg};
// Register aliases // Register aliases
const Register kLithiumScratch = r1; // lithium scratch. constexpr Register kLithiumScratch = r1; // lithium scratch.
const Register kRootRegister = r10; // Roots array pointer. constexpr Register kRootRegister = r10; // Roots array pointer.
const Register cp = r13; // JavaScript context pointer. constexpr Register cp = r13; // JavaScript context pointer.
static const bool kSimpleFPAliasing = true; constexpr bool kSimpleFPAliasing = true;
static const bool kSimdMaskRegisters = false; constexpr bool kSimdMaskRegisters = false;
// Double word FP register. // Double word FP register.
struct DoubleRegister { struct DoubleRegister {
...@@ -199,8 +199,8 @@ struct DoubleRegister { ...@@ -199,8 +199,8 @@ struct DoubleRegister {
kCode_no_reg = -1 kCode_no_reg = -1
}; };
static const int kNumRegisters = Code::kAfterLast; static constexpr int kNumRegisters = Code::kAfterLast;
static const int kMaxNumRegisters = kNumRegisters; static constexpr int kMaxNumRegisters = kNumRegisters;
bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; } bool is_valid() const { return 0 <= reg_code && reg_code < kNumRegisters; }
bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; } bool is(DoubleRegister reg) const { return reg_code == reg.reg_code; }
...@@ -228,17 +228,14 @@ typedef DoubleRegister FloatRegister; ...@@ -228,17 +228,14 @@ typedef DoubleRegister FloatRegister;
// TODO(john.yan) Define SIMD registers. // TODO(john.yan) Define SIMD registers.
typedef DoubleRegister Simd128Register; typedef DoubleRegister Simd128Register;
#define DECLARE_REGISTER(R) \ #define DEFINE_REGISTER(R) \
const DoubleRegister R = {DoubleRegister::kCode_##R}; constexpr DoubleRegister R = {DoubleRegister::kCode_##R};
DOUBLE_REGISTERS(DECLARE_REGISTER) DOUBLE_REGISTERS(DEFINE_REGISTER)
#undef DECLARE_REGISTER #undef DEFINE_REGISTER
const Register no_dreg = {Register::kCode_no_reg}; constexpr Register no_dreg = {Register::kCode_no_reg};
// Aliases for double registers. Defined using #define instead of constexpr DoubleRegister kDoubleRegZero = d14;
// "static const DoubleRegister&" because Clang complains otherwise when a constexpr DoubleRegister kScratchDoubleReg = d13;
// compilation unit that includes this header doesn't use the variables.
#define kDoubleRegZero d14
#define kScratchDoubleReg d13
Register ToRegister(int num); Register ToRegister(int num);
...@@ -259,24 +256,24 @@ struct CRegister { ...@@ -259,24 +256,24 @@ struct CRegister {
int reg_code; int reg_code;
}; };
const CRegister no_creg = {-1}; constexpr CRegister no_creg = {-1};
const CRegister cr0 = {0}; constexpr CRegister cr0 = {0};
const CRegister cr1 = {1}; constexpr CRegister cr1 = {1};
const CRegister cr2 = {2}; constexpr CRegister cr2 = {2};
const CRegister cr3 = {3}; constexpr CRegister cr3 = {3};
const CRegister cr4 = {4}; constexpr CRegister cr4 = {4};
const CRegister cr5 = {5}; constexpr CRegister cr5 = {5};
const CRegister cr6 = {6}; constexpr CRegister cr6 = {6};
const CRegister cr7 = {7}; constexpr CRegister cr7 = {7};
// ----------------------------------------------------------------------------- // -----------------------------------------------------------------------------
// Machine instruction Operands // Machine instruction Operands
#if V8_TARGET_ARCH_S390X #if V8_TARGET_ARCH_S390X
const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64; constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE64;
#else #else
const RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32; constexpr RelocInfo::Mode kRelocInfo_NONEPTR = RelocInfo::NONE32;
#endif #endif
// Class Operand represents a shifter operand in data processing instructions // Class Operand represents a shifter operand in data processing instructions
...@@ -479,13 +476,13 @@ class Assembler : public AssemblerBase { ...@@ -479,13 +476,13 @@ class Assembler : public AssemblerBase {
// are split across two consecutive instructions and don't exist separately // are split across two consecutive instructions and don't exist separately
// in the code, so the serializer should not step forwards in memory after // in the code, so the serializer should not step forwards in memory after
// a target is resolved and written. // a target is resolved and written.
static const int kSpecialTargetSize = 0; static constexpr int kSpecialTargetSize = 0;
// Number of bytes for instructions used to store pointer sized constant. // Number of bytes for instructions used to store pointer sized constant.
#if V8_TARGET_ARCH_S390X #if V8_TARGET_ARCH_S390X
static const int kBytesForPtrConstant = 12; // IIHF + IILF static constexpr int kBytesForPtrConstant = 12; // IIHF + IILF
#else #else
static const int kBytesForPtrConstant = 6; // IILF static constexpr int kBytesForPtrConstant = 6; // IILF
#endif #endif
// Distance between the instruction referring to the address of the call // Distance between the instruction referring to the address of the call
...@@ -494,27 +491,28 @@ class Assembler : public AssemblerBase { ...@@ -494,27 +491,28 @@ class Assembler : public AssemblerBase {
// Offset between call target address and return address // Offset between call target address and return address
// for BRASL calls // for BRASL calls
// Patch will be appiled to other FIXED_SEQUENCE call // Patch will be appiled to other FIXED_SEQUENCE call
static const int kCallTargetAddressOffset = 6; static constexpr int kCallTargetAddressOffset = 6;
// The length of FIXED_SEQUENCE call // The length of FIXED_SEQUENCE call
// iihf r8, <address_hi> // <64-bit only> // iihf r8, <address_hi> // <64-bit only>
// iilf r8, <address_lo> // iilf r8, <address_lo>
// basr r14, r8 // basr r14, r8
#if V8_TARGET_ARCH_S390X #if V8_TARGET_ARCH_S390X
static const int kCallSequenceLength = 14; static constexpr int kCallSequenceLength = 14;
#else #else
static const int kCallSequenceLength = 8; static constexpr int kCallSequenceLength = 8;
#endif #endif
// This is the length of the BreakLocationIterator::SetDebugBreakAtReturn() // This is the length of the BreakLocationIterator::SetDebugBreakAtReturn()
// code patch FIXED_SEQUENCE in bytes! // code patch FIXED_SEQUENCE in bytes!
// JS Return Sequence = Call Sequence + BKPT // JS Return Sequence = Call Sequence + BKPT
// static const int kJSReturnSequenceLength = kCallSequenceLength + 2; // static constexpr int kJSReturnSequenceLength = kCallSequenceLength + 2;
// This is the length of the code sequence from SetDebugBreakAtSlot() // This is the length of the code sequence from SetDebugBreakAtSlot()
// FIXED_SEQUENCE in bytes! // FIXED_SEQUENCE in bytes!
static const int kDebugBreakSlotLength = kCallSequenceLength; static constexpr int kDebugBreakSlotLength = kCallSequenceLength;
static const int kPatchDebugBreakSlotReturnOffset = kCallTargetAddressOffset; static constexpr int kPatchDebugBreakSlotReturnOffset =
kCallTargetAddressOffset;
// Length to patch between the start of the JS return sequence // Length to patch between the start of the JS return sequence
// from SetDebugBreakAtReturn and the address from // from SetDebugBreakAtReturn and the address from
...@@ -523,13 +521,13 @@ class Assembler : public AssemblerBase { ...@@ -523,13 +521,13 @@ class Assembler : public AssemblerBase {
// frame->pc() in Debug::SetAfterBreakTarget will point to BKPT in // frame->pc() in Debug::SetAfterBreakTarget will point to BKPT in
// JS return sequence, so the length to patch will not include BKPT // JS return sequence, so the length to patch will not include BKPT
// instruction length. // instruction length.
// static const int kPatchReturnSequenceAddressOffset = // static constexpr int kPatchReturnSequenceAddressOffset =
// kCallSequenceLength - kPatchDebugBreakSlotReturnOffset; // kCallSequenceLength - kPatchDebugBreakSlotReturnOffset;
// Length to patch between the start of the FIXED call sequence from // Length to patch between the start of the FIXED call sequence from
// SetDebugBreakAtSlot() and the the address from // SetDebugBreakAtSlot() and the the address from
// break_address_from_return_address. // break_address_from_return_address.
static const int kPatchDebugBreakSlotAddressOffset = static constexpr int kPatchDebugBreakSlotAddressOffset =
kDebugBreakSlotLength - kPatchDebugBreakSlotReturnOffset; kDebugBreakSlotLength - kPatchDebugBreakSlotReturnOffset;
static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) { static inline int encode_crbit(const CRegister& cr, enum CRBit crbit) {
...@@ -1365,11 +1363,11 @@ class Assembler : public AssemblerBase { ...@@ -1365,11 +1363,11 @@ class Assembler : public AssemblerBase {
// the generated instructions. This is so that multi-instruction sequences do // the generated instructions. This is so that multi-instruction sequences do
// not have to check for overflow. The same is true for writes of large // not have to check for overflow. The same is true for writes of large
// relocation info entries. // relocation info entries.
static const int kGap = 32; static constexpr int kGap = 32;
// Relocation info generation // Relocation info generation
// Each relocation is encoded as a variable size value // Each relocation is encoded as a variable size value
static const int kMaxRelocSize = RelocInfoWriter::kMaxSize; static constexpr int kMaxRelocSize = RelocInfoWriter::kMaxSize;
RelocInfoWriter reloc_info_writer; RelocInfoWriter reloc_info_writer;
std::vector<DeferredRelocInfo> relocations_; std::vector<DeferredRelocInfo> relocations_;
......
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