Commit e41e09ca authored by zhengxing.li's avatar zhengxing.li Committed by Commit bot

X87: [wasm] Use the Float64Max/Min machine operators to implement F64Max/Min.

  port 96c90f6c (r38410)

  original commit message:
  I had to adjust Float64Max/Min on x64 slightly to return the default
  wasm NaN (0x7FF0000000000000) instead of the all-ones NaN
  (0xFFFFFFFFFFFFFFFF).

BUG=

Review-Url: https://codereview.chromium.org/2233273002
Cr-Commit-Position: refs/heads/master@{#38570}
parent 8d491089
......@@ -191,17 +191,35 @@ class OutOfLineLoadInteger final : public OutOfLineCode {
Register const result_;
};
class OutOfLineLoadNaN final : public OutOfLineCode {
class OutOfLineLoadFloat32NaN final : public OutOfLineCode {
public:
OutOfLineLoadNaN(CodeGenerator* gen, X87Register result)
OutOfLineLoadFloat32NaN(CodeGenerator* gen, X87Register result)
: OutOfLineCode(gen), result_(result) {}
void Generate() final {
DCHECK(result_.code() == 0);
USE(result_);
__ fstp(0);
__ push(Immediate(0xffffffff));
__ push(Immediate(0x7fffffff));
__ push(Immediate(0xffc00000));
__ fld_s(MemOperand(esp, 0));
__ lea(esp, Operand(esp, kFloatSize));
}
private:
X87Register const result_;
};
class OutOfLineLoadFloat64NaN final : public OutOfLineCode {
public:
OutOfLineLoadFloat64NaN(CodeGenerator* gen, X87Register result)
: OutOfLineCode(gen), result_(result) {}
void Generate() final {
DCHECK(result_.code() == 0);
USE(result_);
__ fstp(0);
__ push(Immediate(0xfff80000));
__ push(Immediate(0x00000000));
__ fld_d(MemOperand(esp, 0));
__ lea(esp, Operand(esp, kDoubleSize));
}
......@@ -210,7 +228,6 @@ class OutOfLineLoadNaN final : public OutOfLineCode {
X87Register const result_;
};
class OutOfLineTruncateDoubleToI final : public OutOfLineCode {
public:
OutOfLineTruncateDoubleToI(CodeGenerator* gen, Register result,
......@@ -271,7 +288,7 @@ class OutOfLineRecordWrite final : public OutOfLineCode {
} // namespace
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr) \
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, OutOfLineLoadNaN) \
do { \
auto result = i.OutputDoubleRegister(); \
auto offset = i.InputRegister(0); \
......@@ -1295,7 +1312,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ fld(1);
__ FCmp();
auto ool = new (zone()) OutOfLineLoadNaN(this, i.OutputDoubleRegister());
auto ool =
new (zone()) OutOfLineLoadFloat64NaN(this, i.OutputDoubleRegister());
__ j(parity_even, ool->entry());
__ j(below, &done_compare, Label::kNear);
__ j(above, &compare_swap, Label::kNear);
......@@ -1330,7 +1348,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
__ fld(1);
__ FCmp();
auto ool = new (zone()) OutOfLineLoadNaN(this, i.OutputDoubleRegister());
auto ool =
new (zone()) OutOfLineLoadFloat64NaN(this, i.OutputDoubleRegister());
__ j(parity_even, ool->entry());
__ j(above, &done_compare, Label::kNear);
__ j(below, &compare_swap, Label::kNear);
......@@ -1898,10 +1917,10 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
ASSEMBLE_CHECKED_LOAD_INTEGER(mov);
break;
case kCheckedLoadFloat32:
ASSEMBLE_CHECKED_LOAD_FLOAT(fld_s);
ASSEMBLE_CHECKED_LOAD_FLOAT(fld_s, OutOfLineLoadFloat32NaN);
break;
case kCheckedLoadFloat64:
ASSEMBLE_CHECKED_LOAD_FLOAT(fld_d);
ASSEMBLE_CHECKED_LOAD_FLOAT(fld_d, OutOfLineLoadFloat64NaN);
break;
case kCheckedStoreWord8:
ASSEMBLE_CHECKED_STORE_INTEGER(mov_b);
......
......@@ -4735,8 +4735,8 @@ void LCodeGen::EmitNumberUntagDNoSSE2(LNumberUntagD* instr, Register input_reg,
DeoptimizeReason::kNotAHeapNumberUndefined);
__ bind(&convert);
__ push(Immediate(0xffffffff));
__ push(Immediate(0x7fffffff));
__ push(Immediate(0xfff80000));
__ push(Immediate(0x00000000));
__ fld_d(MemOperand(esp, 0));
__ lea(esp, Operand(esp, kDoubleSize));
__ jmp(&done, Label::kNear);
......
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