Commit e408c233 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[ia32] Merge some macro-assembler functions into macro lists

Bug: v8:11384
Change-Id: I5efbcd661242b8c8e23225f921b9170db66d98dd
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2740486Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73283}
parent 19b62d0b
...@@ -2146,35 +2146,6 @@ void TurboAssembler::Move(XMMRegister dst, uint64_t src) { ...@@ -2146,35 +2146,6 @@ void TurboAssembler::Move(XMMRegister dst, uint64_t src) {
} }
} }
void TurboAssembler::Cmpeqps(XMMRegister dst, XMMRegister src1,
XMMRegister src2) {
if (CpuFeatures::IsSupported(AVX)) {
CpuFeatureScope avx_scope(this, AVX);
vcmpeqps(dst, src1, src2);
} else {
movaps(dst, src1);
cmpeqps(dst, src2);
}
}
void TurboAssembler::Psraw(XMMRegister dst, uint8_t shift) {
if (CpuFeatures::IsSupported(AVX)) {
CpuFeatureScope scope(this, AVX);
vpsraw(dst, dst, shift);
} else {
psraw(dst, shift);
}
}
void TurboAssembler::Psrlq(XMMRegister dst, uint8_t shift) {
if (CpuFeatures::IsSupported(AVX)) {
CpuFeatureScope scope(this, AVX);
vpsrlq(dst, dst, shift);
} else {
psrlq(dst, shift);
}
}
void TurboAssembler::Pshufb(XMMRegister dst, XMMRegister src, Operand mask) { void TurboAssembler::Pshufb(XMMRegister dst, XMMRegister src, Operand mask) {
if (CpuFeatures::IsSupported(AVX)) { if (CpuFeatures::IsSupported(AVX)) {
CpuFeatureScope scope(this, AVX); CpuFeatureScope scope(this, AVX);
......
...@@ -300,11 +300,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { ...@@ -300,11 +300,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// may be bigger than 2^16 - 1. Requires a scratch register. // may be bigger than 2^16 - 1. Requires a scratch register.
void Ret(int bytes_dropped, Register scratch); void Ret(int bytes_dropped, Register scratch);
// Three-operand cmpeqps that moves src1 to dst if AVX is not supported.
void Cmpeqps(XMMRegister dst, XMMRegister src1, XMMRegister src2);
void Psraw(XMMRegister dst, uint8_t shift);
void Psrlq(XMMRegister dst, uint8_t shift);
// Instructions whose SSE and AVX take the same number and type of operands. // Instructions whose SSE and AVX take the same number and type of operands.
#define AVX_OP3_WITH_TYPE(macro_name, name, dst_type, src1_type, src2_type) \ #define AVX_OP3_WITH_TYPE(macro_name, name, dst_type, src1_type, src2_type) \
void macro_name(dst_type dst, src1_type src1, src2_type src2) { \ void macro_name(dst_type dst, src1_type src1, src2_type src2) { \
...@@ -436,6 +431,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { ...@@ -436,6 +431,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
AVX_OP3_XO(Andnpd, andnpd) AVX_OP3_XO(Andnpd, andnpd)
AVX_OP3_XO(Pmullw, pmullw) AVX_OP3_XO(Pmullw, pmullw)
AVX_OP3_WITH_TYPE(Movhlps, movhlps, XMMRegister, XMMRegister) AVX_OP3_WITH_TYPE(Movhlps, movhlps, XMMRegister, XMMRegister)
AVX_OP3_WITH_TYPE(Psraw, psraw, XMMRegister, uint8_t)
AVX_OP3_WITH_TYPE(Psrlq, psrlq, XMMRegister, uint8_t)
#undef AVX_OP3_XO #undef AVX_OP3_XO
#undef AVX_OP3_WITH_TYPE #undef AVX_OP3_WITH_TYPE
...@@ -552,6 +549,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase { ...@@ -552,6 +549,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
name(dst, src2); \ name(dst, src2); \
} \ } \
} }
AVX_OP3_WITH_MOVE(Cmpeqps, cmpeqps, XMMRegister, XMMRegister)
AVX_OP3_WITH_MOVE(Movlps, movlps, XMMRegister, Operand) AVX_OP3_WITH_MOVE(Movlps, movlps, XMMRegister, Operand)
AVX_OP3_WITH_MOVE(Movhps, movhps, XMMRegister, Operand) AVX_OP3_WITH_MOVE(Movhps, movhps, XMMRegister, Operand)
AVX_OP3_WITH_MOVE(Pmaddwd, pmaddwd, XMMRegister, Operand) AVX_OP3_WITH_MOVE(Pmaddwd, pmaddwd, XMMRegister, Operand)
......
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