S390 [liftoff]: Implement simd i32 to fp32 conversion

Change-Id: I251df1abd2f7facc1ee5adad7a7dbf70c1554d22
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3432985Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#78910}

src/codegen/s390/macro-assembler-s390.cc

@@ -5637,6 +5637,36 @@ void TurboAssembler::I32x4UConvertF32x4(Simd128Register dst,
 }
 #undef CONVERT_FLOAT_TO_INT32
 
+#define CONVERT_INT32_TO_FLOAT(convert, dst, src, scratch1, scratch2) \
+  for (int index = 0; index < 4; index++) {                           \
+    vlgv(scratch2, src, MemOperand(r0, index), Condition(2));         \
+    convert(scratch1, scratch2);                                      \
+    MovFloatToInt(scratch2, scratch1);                                \
+    vlvg(dst, scratch2, MemOperand(r0, index), Condition(2));         \
+  }
+void TurboAssembler::F32x4SConvertI32x4(Simd128Register dst,
+                                        Simd128Register src,
+                                        Simd128Register scratch1,
+                                        Register scratch2) {
+  if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
+    vcdg(dst, src, Condition(4), Condition(0), Condition(2));
+  } else {
+    CONVERT_INT32_TO_FLOAT(ConvertIntToFloat, dst, src, scratch1, scratch2)
+  }
+}
+void TurboAssembler::F32x4UConvertI32x4(Simd128Register dst,
+                                        Simd128Register src,
+                                        Simd128Register scratch1,
+                                        Register scratch2) {
+  if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
+    vcdlg(dst, src, Condition(4), Condition(0), Condition(2));
+  } else {
+    CONVERT_INT32_TO_FLOAT(ConvertUnsignedIntToFloat, dst, src, scratch1,
+                           scratch2)
+  }
+}
+#undef CONVERT_INT32_TO_FLOAT
+
 // Vector LE Load and Transform instructions.
 #ifdef V8_TARGET_BIG_ENDIAN
 #define IS_BIG_ENDIAN true

src/codegen/s390/macro-assembler-s390.h

@@ -1118,6 +1118,10 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
                           Simd128Register scratch1, Register scratch2);
   void I32x4UConvertF32x4(Simd128Register dst, Simd128Register src,
                           Simd128Register scratch1, Register scratch2);
+  void F32x4SConvertI32x4(Simd128Register dst, Simd128Register src,
+                          Simd128Register scratch1, Register scratch2);
+  void F32x4UConvertI32x4(Simd128Register dst, Simd128Register src,
+                          Simd128Register scratch1, Register scratch2);
 
 #define SIMD_UNOP_LIST(V)   \
   V(F64x2Abs)               \

src/compiler/backend/s390/code-generator-s390.cc

@@ -2892,35 +2892,18 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
                             kScratchReg);
       break;
     }
-#undef CONVERT_FLOAT_TO_INT32
-#define CONVERT_INT32_TO_FLOAT(convert, double_index)               \
-  Simd128Register src = i.InputSimd128Register(0);                  \
-  Simd128Register dst = i.OutputSimd128Register();                  \
-  for (int index = 0; index < 4; index++) {                         \
-    __ vlgv(kScratchReg, src, MemOperand(r0, index), Condition(2)); \
-    __ convert(kScratchDoubleReg, kScratchReg);                     \
-    __ MovFloatToInt(kScratchReg, kScratchDoubleReg);               \
-    __ vlvg(dst, kScratchReg, MemOperand(r0, index), Condition(2)); \
-  }
     case kS390_F32x4SConvertI32x4: {
-      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
-        __ vcdg(i.OutputSimd128Register(), i.InputSimd128Register(0),
-                Condition(4), Condition(0), Condition(2));
-      } else {
-        CONVERT_INT32_TO_FLOAT(ConvertIntToFloat, 0)
-      }
+      __ F32x4SConvertI32x4(i.OutputSimd128Register(),
+                            i.InputSimd128Register(0), kScratchDoubleReg,
+                            kScratchReg);
       break;
     }
     case kS390_F32x4UConvertI32x4: {
-      if (CpuFeatures::IsSupported(VECTOR_ENHANCE_FACILITY_2)) {
-        __ vcdlg(i.OutputSimd128Register(), i.InputSimd128Register(0),
-                 Condition(4), Condition(0), Condition(2));
-      } else {
-        CONVERT_INT32_TO_FLOAT(ConvertUnsignedIntToFloat, 0)
-      }
+      __ F32x4UConvertI32x4(i.OutputSimd128Register(),
+                            i.InputSimd128Register(0), kScratchDoubleReg,
+                            kScratchReg);
       break;
     }
-#undef CONVERT_INT32_TO_FLOAT
     case kS390_I16x8SConvertI32x4:
       __ vpks(i.OutputSimd128Register(), i.InputSimd128Register(1),
               i.InputSimd128Register(0), Condition(0), Condition(2));

src/wasm/baseline/s390/liftoff-assembler-s390.h

@@ -2692,12 +2692,12 @@ void LiftoffAssembler::emit_i32x4_uconvert_f32x4(LiftoffRegister dst,
 
 void LiftoffAssembler::emit_f32x4_sconvert_i32x4(LiftoffRegister dst,
                                                  LiftoffRegister src) {
-  bailout(kSimd, "f32x4_sconvert_i32x4");
+  F32x4SConvertI32x4(dst.fp(), src.fp(), kScratchDoubleReg, r0);
 }
 
 void LiftoffAssembler::emit_f32x4_uconvert_i32x4(LiftoffRegister dst,
                                                  LiftoffRegister src) {
-  bailout(kSimd, "f32x4_uconvert_i32x4");
+  F32x4UConvertI32x4(dst.fp(), src.fp(), kScratchDoubleReg, r0);
 }
 
 void LiftoffAssembler::emit_f32x4_demote_f64x2_zero(LiftoffRegister dst,