MIPS[64]: Optimize kMips[64]Tst in code-generator-mips[64].cc

A small change that brings a lot of benefit since it is used in a lot
of places.

BUG=

Review-Url: https://codereview.chromium.org/2477453005
Cr-Commit-Position: refs/heads/master@{#40982}

src/compiler/mips/code-generator-mips.cc

@@ -1716,8 +1716,15 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
 
   if (instr->arch_opcode() == kMipsTst) {
     cc = FlagsConditionToConditionTst(condition);
-    __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1));
-    __ Sltu(result, zero_reg, kScratchReg);
+    if (instr->InputAt(1)->IsImmediate() &&
+        base::bits::IsPowerOfTwo32(i.InputOperand(1).immediate())) {
+      uint16_t pos =
+          base::bits::CountTrailingZeros32(i.InputOperand(1).immediate());
+      __ Ext(result, i.InputRegister(0), pos, 1);
+    } else {
+      __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1));
+      __ Sltu(result, zero_reg, kScratchReg);
+    }
     if (cc == eq) {
       // Sltu produces 0 for equality, invert the result.
       __ xori(result, result, 1);

src/compiler/mips/instruction-selector-mips.cc

@@ -43,6 +43,7 @@ class MipsOperandGenerator final : public OperandGenerator {
       case kMipsAdd:
       case kMipsAnd:
       case kMipsOr:
+      case kMipsTst:
       case kMipsSub:
       case kMipsXor:
         return is_uint16(value);

src/compiler/mips64/code-generator-mips64.cc

@@ -2026,8 +2026,15 @@ void CodeGenerator::AssembleArchBoolean(Instruction* instr,
 
   if (instr->arch_opcode() == kMips64Tst) {
     cc = FlagsConditionToConditionTst(condition);
-    __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1));
-    __ Sltu(result, zero_reg, kScratchReg);
+    if (instr->InputAt(1)->IsImmediate() &&
+        base::bits::IsPowerOfTwo64(i.InputOperand(1).immediate())) {
+      uint16_t pos =
+          base::bits::CountTrailingZeros64(i.InputOperand(1).immediate());
+      __ ExtractBits(result, i.InputRegister(0), pos, 1);
+    } else {
+      __ And(kScratchReg, i.InputRegister(0), i.InputOperand(1));
+      __ Sltu(result, zero_reg, kScratchReg);
+    }
     if (cc == eq) {
       // Sltu produces 0 for equality, invert the result.
       __ xori(result, result, 1);

src/compiler/mips64/instruction-selector-mips64.cc

@@ -65,6 +65,7 @@ class Mips64OperandGenerator final : public OperandGenerator {
       case kMips64Dadd:
       case kMips64Or32:
       case kMips64Or:
+      case kMips64Tst:
       case kMips64Xor:
         return is_uint16(value);
       case kMips64Ldc1:

src/mips64/macro-assembler-mips64.cc

@@ -1758,11 +1758,27 @@ void MacroAssembler::Ext(Register rt,
   ext_(rt, rs, pos, size);
 }
 
+void MacroAssembler::ExtractBits(Register rt, Register rs, uint16_t pos,
+                                 uint16_t size) {
+  DCHECK(pos < 64);
+  DCHECK(size > 0 && size <= 64);
+  DCHECK(pos + size <= 64);
+  if (pos < 32) {
+    if (size <= 32) {
+      Dext(rt, rs, pos, size);
+    } else {
+      Dextm(rt, rs, pos, size);
+    }
+  } else if (pos < 64) {
+    DCHECK(size <= 32);
+    Dextu(rt, rs, pos, size);
+  }
+}
 
 void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos,
                           uint16_t size) {
   DCHECK(pos < 32);
-  DCHECK(pos + size < 33);
+  DCHECK(size > 0 && size <= 32);
   dext_(rt, rs, pos, size);
 }
 
@@ -1770,7 +1786,8 @@ void MacroAssembler::Dext(Register rt, Register rs, uint16_t pos,
 void MacroAssembler::Dextm(Register rt, Register rs, uint16_t pos,
                            uint16_t size) {
   DCHECK(pos < 32);
-  DCHECK(size <= 64);
+  DCHECK(size > 32 && size <= 64);
+  DCHECK((pos + size) > 32 && (pos + size) <= 64);
   dextm(rt, rs, pos, size);
 }
 
@@ -1778,7 +1795,8 @@ void MacroAssembler::Dextm(Register rt, Register rs, uint16_t pos,
 void MacroAssembler::Dextu(Register rt, Register rs, uint16_t pos,
                            uint16_t size) {
   DCHECK(pos >= 32 && pos < 64);
-  DCHECK(size < 33);
+  DCHECK(size > 0 && size <= 32);
+  DCHECK((pos + size) > 32 && (pos + size) <= 64);
   dextu(rt, rs, pos, size);
 }
 

src/mips64/macro-assembler-mips64.h

@@ -873,6 +873,9 @@ class MacroAssembler: public Assembler {
   void Ins(Register rt, Register rs, uint16_t pos, uint16_t size);
   void Dins(Register rt, Register rs, uint16_t pos, uint16_t size);
   void Ext(Register rt, Register rs, uint16_t pos, uint16_t size);
+
+  void ExtractBits(Register rt, Register rs, uint16_t pos, uint16_t size);
+
   void Dext(Register rt, Register rs, uint16_t pos, uint16_t size);
   void Dextm(Register rt, Register rs, uint16_t pos, uint16_t size);
   void Dextu(Register rt, Register rs, uint16_t pos, uint16_t size);