Commit dfcc4199 authored by Clemens Backes's avatar Clemens Backes Committed by Commit Bot

[Liftoff] Remove dead argument from i32 shift operations

The {pinned} argument is always an empty register list now. Hence this
CL removes it.

R=jkummerow@chromium.org

Bug: v8:9919
Change-Id: I3b7612d90b0577f2763c5ab70c34eeb11307657b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1899607
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Reviewed-by: 's avatarJakob Kummerow <jkummerow@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64761}
parent 5b1ba2ab
......@@ -165,8 +165,7 @@ template <void (TurboAssembler::*op)(Register, Register, Register, Register,
Register),
bool is_left_shift>
inline void I64Shiftop(LiftoffAssembler* assm, LiftoffRegister dst,
LiftoffRegister src, Register amount,
LiftoffRegList pinned) {
LiftoffRegister src, Register amount) {
Register src_low = src.low_gp();
Register src_high = src.high_gp();
Register dst_low = dst.low_gp();
......@@ -174,8 +173,7 @@ inline void I64Shiftop(LiftoffAssembler* assm, LiftoffRegister dst,
// Left shift writes {dst_high} then {dst_low}, right shifts write {dst_low}
// then {dst_high}.
Register clobbered_dst_reg = is_left_shift ? dst_high : dst_low;
pinned.set(clobbered_dst_reg);
pinned.set(src);
LiftoffRegList pinned = LiftoffRegList::ForRegs(clobbered_dst_reg, src);
Register amount_capped =
pinned.set(assm->GetUnusedRegister(kGpReg, pinned)).gp();
assm->and_(amount_capped, amount, Operand(0x3F));
......@@ -686,21 +684,21 @@ void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) {
int32_t imm) { \
instruction(dst, lhs, Operand(imm)); \
}
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount, LiftoffRegList pinned) { \
UseScratchRegisterScope temps(this); \
Register scratch = temps.Acquire(); \
and_(scratch, amount, Operand(0x1f)); \
instruction(dst, src, Operand(scratch)); \
} \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
int32_t amount) { \
if (V8_LIKELY((amount & 31) != 0)) { \
instruction(dst, src, Operand(amount & 31)); \
} else if (dst != src) { \
mov(dst, src); \
} \
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount) { \
UseScratchRegisterScope temps(this); \
Register scratch = temps.Acquire(); \
and_(scratch, amount, Operand(0x1f)); \
instruction(dst, src, Operand(scratch)); \
} \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
int32_t amount) { \
if (V8_LIKELY((amount & 31) != 0)) { \
instruction(dst, src, Operand(amount & 31)); \
} else if (dst != src) { \
mov(dst, src); \
} \
}
#define FP32_UNOP(name, instruction) \
void LiftoffAssembler::emit_##name(DoubleRegister dst, DoubleRegister src) { \
......@@ -936,21 +934,18 @@ bool LiftoffAssembler::emit_i64_remu(LiftoffRegister dst, LiftoffRegister lhs,
}
void LiftoffAssembler::emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
liftoff::I64Shiftop<&TurboAssembler::LslPair, true>(this, dst, src, amount,
pinned);
Register amount) {
liftoff::I64Shiftop<&TurboAssembler::LslPair, true>(this, dst, src, amount);
}
void LiftoffAssembler::emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
liftoff::I64Shiftop<&TurboAssembler::AsrPair, false>(this, dst, src, amount,
pinned);
Register amount) {
liftoff::I64Shiftop<&TurboAssembler::AsrPair, false>(this, dst, src, amount);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
liftoff::I64Shiftop<&TurboAssembler::LsrPair, false>(this, dst, src, amount,
pinned);
Register amount) {
liftoff::I64Shiftop<&TurboAssembler::LsrPair, false>(this, dst, src, amount);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
......
......@@ -482,18 +482,18 @@ void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) {
instruction(dst.D(), src.D()); \
return true; \
}
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount, LiftoffRegList pinned) { \
instruction(dst.W(), src.W(), amount.W()); \
} \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
int32_t amount) { \
instruction(dst.W(), src.W(), amount & 31); \
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount) { \
instruction(dst.W(), src.W(), amount.W()); \
} \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
int32_t amount) { \
instruction(dst.W(), src.W(), amount & 31); \
}
#define I64_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \
Register amount, LiftoffRegList pinned) { \
Register amount) { \
instruction(dst.gp().X(), src.gp().X(), amount.X()); \
}
#define I64_SHIFTOP_I(name, instruction) \
......
......@@ -716,11 +716,8 @@ void LiftoffAssembler::emit_i32_xor(Register dst, Register lhs, int32_t imm) {
namespace liftoff {
inline void EmitShiftOperation(LiftoffAssembler* assm, Register dst,
Register src, Register amount,
void (Assembler::*emit_shift)(Register),
LiftoffRegList pinned) {
pinned.set(dst);
pinned.set(src);
pinned.set(amount);
void (Assembler::*emit_shift)(Register)) {
LiftoffRegList pinned = LiftoffRegList::ForRegs(dst, src, amount);
// If dst is ecx, compute into a tmp register first, then move to ecx.
if (dst == ecx) {
Register tmp = assm->GetUnusedRegister(kGpReg, pinned).gp();
......@@ -753,10 +750,9 @@ inline void EmitShiftOperation(LiftoffAssembler* assm, Register dst,
}
} // namespace liftoff
void LiftoffAssembler::emit_i32_shl(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::shl_cl,
pinned);
void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::shl_cl);
}
void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
......@@ -765,10 +761,9 @@ void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
shl(dst, amount & 31);
}
void LiftoffAssembler::emit_i32_sar(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::sar_cl,
pinned);
void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::sar_cl);
}
void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
......@@ -777,10 +772,9 @@ void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
sar(dst, amount & 31);
}
void LiftoffAssembler::emit_i32_shr(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::shr_cl,
pinned);
void LiftoffAssembler::emit_i32_shr(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation(this, dst, src, amount, &Assembler::shr_cl);
}
void LiftoffAssembler::emit_i32_shr(Register dst, Register src,
......@@ -965,10 +959,9 @@ inline LiftoffRegister ReplaceInPair(LiftoffRegister pair, Register old_reg,
inline void Emit64BitShiftOperation(
LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src,
Register amount, void (TurboAssembler::*emit_shift)(Register, Register),
LiftoffRegList pinned) {
Register amount, void (TurboAssembler::*emit_shift)(Register, Register)) {
// Temporary registers cannot overlap with {dst}.
pinned.set(dst);
LiftoffRegList pinned = LiftoffRegList::ForRegs(dst);
constexpr size_t kMaxRegMoves = 3;
base::SmallVector<LiftoffAssembler::ParallelRegisterMoveTuple, kMaxRegMoves>
......@@ -1003,21 +996,21 @@ inline void Emit64BitShiftOperation(
} // namespace liftoff
void LiftoffAssembler::emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::ShlPair_cl, pinned);
&TurboAssembler::ShlPair_cl);
}
void LiftoffAssembler::emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::SarPair_cl, pinned);
&TurboAssembler::SarPair_cl);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::ShrPair_cl, pinned);
&TurboAssembler::ShrPair_cl);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
......
......@@ -408,14 +408,11 @@ class LiftoffAssembler : public TurboAssembler {
inline void emit_i32_or(Register dst, Register lhs, int32_t imm);
inline void emit_i32_xor(Register dst, Register lhs, Register rhs);
inline void emit_i32_xor(Register dst, Register lhs, int32_t imm);
inline void emit_i32_shl(Register dst, Register src, Register amount,
LiftoffRegList pinned = {});
inline void emit_i32_shl(Register dst, Register src, Register amount);
inline void emit_i32_shl(Register dst, Register src, int32_t amount);
inline void emit_i32_sar(Register dst, Register src, Register amount,
LiftoffRegList pinned = {});
inline void emit_i32_sar(Register dst, Register src, Register amount);
inline void emit_i32_sar(Register dst, Register src, int32_t amount);
inline void emit_i32_shr(Register dst, Register src, Register amount,
LiftoffRegList pinned = {});
inline void emit_i32_shr(Register dst, Register src, Register amount);
inline void emit_i32_shr(Register dst, Register src, int32_t amount);
// i32 unops.
......@@ -454,11 +451,11 @@ class LiftoffAssembler : public TurboAssembler {
inline void emit_i64_xor(LiftoffRegister dst, LiftoffRegister lhs,
int32_t imm);
inline void emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned = {});
Register amount);
inline void emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned = {});
Register amount);
inline void emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned = {});
Register amount);
inline void emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
int amount);
......
......@@ -998,13 +998,13 @@ class LiftoffCompiler {
[=](LiftoffRegister dst, LiftoffRegister lhs, LiftoffRegister rhs) { \
__ emit_f64_set_cond(cond, dst.gp(), lhs.fp(), rhs.fp()); \
});
#define CASE_I64_SHIFTOP(opcode, fn) \
case kExpr##opcode: \
return EmitBinOp<kWasmI64, kWasmI64>([=](LiftoffRegister dst, \
LiftoffRegister src, \
LiftoffRegister amount) { \
__ emit_##fn(dst, src, amount.is_pair() ? amount.low_gp() : amount.gp(), \
{}); \
#define CASE_I64_SHIFTOP(opcode, fn) \
case kExpr##opcode: \
return EmitBinOp<kWasmI64, kWasmI64>([=](LiftoffRegister dst, \
LiftoffRegister src, \
LiftoffRegister amount) { \
__ emit_##fn(dst, src, \
amount.is_pair() ? amount.low_gp() : amount.gp()); \
});
#define CASE_CCALL_BINOP(opcode, type, ext_ref_fn) \
case kExpr##opcode: \
......
......@@ -719,10 +719,10 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
return true;
}
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i32_##name( \
Register dst, Register src, Register amount, LiftoffRegList pinned) { \
instruction(dst, src, amount); \
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
Register amount) { \
instruction(dst, src, amount); \
}
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
......@@ -803,12 +803,9 @@ inline void Emit64BitShiftOperation(
LiftoffAssembler* assm, LiftoffRegister dst, LiftoffRegister src,
Register amount,
void (TurboAssembler::*emit_shift)(Register, Register, Register, Register,
Register, Register, Register),
LiftoffRegList pinned) {
Register, Register, Register)) {
Label move, done;
pinned.set(dst);
pinned.set(src);
pinned.set(amount);
LiftoffRegList pinned = LiftoffRegList::ForRegs(dst, src, amount);
// If some of destination registers are in use, get another, unused pair.
// That way we prevent overwriting some input registers while shifting.
......@@ -843,21 +840,21 @@ inline void Emit64BitShiftOperation(
} // namespace liftoff
void LiftoffAssembler::emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::ShlPair, pinned);
&TurboAssembler::ShlPair);
}
void LiftoffAssembler::emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::SarPair, pinned);
&TurboAssembler::SarPair);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::Emit64BitShiftOperation(this, dst, src, amount,
&TurboAssembler::ShrPair, pinned);
&TurboAssembler::ShrPair);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
......
......@@ -639,10 +639,10 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
return true;
}
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i32_##name( \
Register dst, Register src, Register amount, LiftoffRegList pinned) { \
instruction(dst, src, amount); \
#define I32_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i32_##name(Register dst, Register src, \
Register amount) { \
instruction(dst, src, amount); \
}
#define I32_SHIFTOP_I(name, instruction) \
I32_SHIFTOP(name, instruction##v) \
......@@ -739,11 +739,10 @@ I64_BINOP_I(xor, Xor)
#undef I64_BINOP_I
#define I64_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i64_##name(LiftoffRegister dst, \
LiftoffRegister src, Register amount, \
LiftoffRegList pinned) { \
instruction(dst.gp(), src.gp(), amount); \
#define I64_SHIFTOP(name, instruction) \
void LiftoffAssembler::emit_i64_##name( \
LiftoffRegister dst, LiftoffRegister src, Register amount) { \
instruction(dst.gp(), src.gp(), amount); \
}
#define I64_SHIFTOP_I(name, instruction) \
I64_SHIFTOP(name, instruction##v) \
......
......@@ -230,14 +230,14 @@ void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) {
bailout(kUnsupportedArchitecture, "fp unop: " #name); \
return true; \
}
#define UNIMPLEMENTED_I32_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount, LiftoffRegList pinned) { \
bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \
#define UNIMPLEMENTED_I32_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount) { \
bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \
}
#define UNIMPLEMENTED_I64_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \
Register amount, LiftoffRegList pinned) { \
Register amount) { \
bailout(kUnsupportedArchitecture, "i64 shiftop: " #name); \
}
......
......@@ -229,14 +229,14 @@ void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) {
bailout(kUnsupportedArchitecture, "fp unop: " #name); \
return true; \
}
#define UNIMPLEMENTED_I32_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount, LiftoffRegList pinned) { \
bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \
#define UNIMPLEMENTED_I32_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(Register dst, Register src, \
Register amount) { \
bailout(kUnsupportedArchitecture, "i32 shiftop: " #name); \
}
#define UNIMPLEMENTED_I64_SHIFTOP(name) \
void LiftoffAssembler::emit_##name(LiftoffRegister dst, LiftoffRegister src, \
Register amount, LiftoffRegList pinned) { \
Register amount) { \
bailout(kUnsupportedArchitecture, "i64 shiftop: " #name); \
}
......
......@@ -684,8 +684,7 @@ namespace liftoff {
template <ValueType type>
inline void EmitShiftOperation(LiftoffAssembler* assm, Register dst,
Register src, Register amount,
void (Assembler::*emit_shift)(Register),
LiftoffRegList pinned) {
void (Assembler::*emit_shift)(Register)) {
// If dst is rcx, compute into the scratch register first, then move to rcx.
if (dst == rcx) {
assm->Move(kScratchRegister, src, type);
......@@ -699,9 +698,8 @@ inline void EmitShiftOperation(LiftoffAssembler* assm, Register dst,
// register. If src is rcx, src is now the scratch register.
bool use_scratch = false;
if (amount != rcx) {
use_scratch = src == rcx ||
assm->cache_state()->is_used(LiftoffRegister(rcx)) ||
pinned.has(LiftoffRegister(rcx));
use_scratch =
src == rcx || assm->cache_state()->is_used(LiftoffRegister(rcx));
if (use_scratch) assm->movq(kScratchRegister, rcx);
if (src == rcx) src = kScratchRegister;
assm->Move(rcx, amount, type);
......@@ -716,10 +714,10 @@ inline void EmitShiftOperation(LiftoffAssembler* assm, Register dst,
}
} // namespace liftoff
void LiftoffAssembler::emit_i32_shl(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation<kWasmI32>(this, dst, src, amount,
&Assembler::shll_cl, pinned);
&Assembler::shll_cl);
}
void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
......@@ -728,10 +726,10 @@ void LiftoffAssembler::emit_i32_shl(Register dst, Register src,
shll(dst, Immediate(amount & 31));
}
void LiftoffAssembler::emit_i32_sar(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation<kWasmI32>(this, dst, src, amount,
&Assembler::sarl_cl, pinned);
&Assembler::sarl_cl);
}
void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
......@@ -740,10 +738,10 @@ void LiftoffAssembler::emit_i32_sar(Register dst, Register src,
sarl(dst, Immediate(amount & 31));
}
void LiftoffAssembler::emit_i32_shr(Register dst, Register src, Register amount,
LiftoffRegList pinned) {
void LiftoffAssembler::emit_i32_shr(Register dst, Register src,
Register amount) {
liftoff::EmitShiftOperation<kWasmI32>(this, dst, src, amount,
&Assembler::shrl_cl, pinned);
&Assembler::shrl_cl);
}
void LiftoffAssembler::emit_i32_shr(Register dst, Register src,
......@@ -873,21 +871,21 @@ void LiftoffAssembler::emit_i64_xor(LiftoffRegister dst, LiftoffRegister lhs,
}
void LiftoffAssembler::emit_i64_shl(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::EmitShiftOperation<kWasmI64>(this, dst.gp(), src.gp(), amount,
&Assembler::shlq_cl, pinned);
&Assembler::shlq_cl);
}
void LiftoffAssembler::emit_i64_sar(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::EmitShiftOperation<kWasmI64>(this, dst.gp(), src.gp(), amount,
&Assembler::sarq_cl, pinned);
&Assembler::sarq_cl);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
Register amount, LiftoffRegList pinned) {
Register amount) {
liftoff::EmitShiftOperation<kWasmI64>(this, dst.gp(), src.gp(), amount,
&Assembler::shrq_cl, pinned);
&Assembler::shrq_cl);
}
void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src,
......
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