ARM: Add comments to clarify conditionally executed code dealing with d16-d31

Review URL: https://codereview.chromium.org/12087132
Patch from Hans Wennborg <hans@chromium.org>.

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@13578 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/arm/deoptimizer-arm.cc

@@ -1011,6 +1011,7 @@ void Deoptimizer::EntryGenerator::Generate() {
     __ CheckFor32DRegs(ip);
 
     // Push registers d0-d13, and possibly d16-d31, on the stack.
+    // If d16-d31 are not pushed, decrease the stack pointer instead.
     __ vstm(db_w, sp, d16, d31, ne);
     __ sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
     __ vstm(db_w, sp, d0, d13);

src/arm/macro-assembler-arm.cc

@@ -887,6 +887,8 @@ void MacroAssembler::EnterExitFrame(bool save_doubles, int stack_space) {
     // Check CPU flags for number of registers, setting the Z condition flag.
     CheckFor32DRegs(ip);
 
+    // Push registers d0-d15, and possibly d16-d31, on the stack.
+    // If d16-d31 are not pushed, decrease the stack pointer instead.
     vstm(db_w, sp, d16, d31, ne);
     sub(sp, sp, Operand(16 * kDoubleSize), LeaveCC, eq);
     vstm(db_w, sp, d0, d15);
@@ -953,6 +955,8 @@ void MacroAssembler::LeaveExitFrame(bool save_doubles,
     // Check CPU flags for number of registers, setting the Z condition flag.
     CheckFor32DRegs(ip);
 
+    // Pop registers d0-d15, and possibly d16-d31, from r3.
+    // If d16-d31 are not popped, increase r3 instead.
     vldm(ia_w, r3, d0, d15);
     vldm(ia_w, r3, d16, d31, ne);
     add(r3, r3, Operand(16 * kDoubleSize), LeaveCC, eq);