Commit dd64a6d8 authored by Ilija.Pavlovic's avatar Ilija.Pavlovic Committed by Commit bot

MIPS64: Eliminate ABI-dependent definitions.

Compilation dependencies for O32 ABI are removed from the code and now
compilation will be done according n64 ABI only.

TEST=
BUG=

Review URL: https://codereview.chromium.org/1638303005

Cr-Commit-Position: refs/heads/master@{#33589}
parent 8b5a7eb6
......@@ -1274,14 +1274,7 @@ void JSEntryStub::Generate(MacroAssembler* masm) {
__ Move(kDoubleRegZero, 0.0);
// Load argv in s0 register.
if (kMipsAbi == kN64) {
__ mov(s0, a4); // 5th parameter in mips64 a4 (a4) register.
} else { // Abi O32.
// 5th parameter on stack for O32 abi.
int offset_to_argv = (kNumCalleeSaved + 1) * kPointerSize;
offset_to_argv += kNumCalleeSavedFPU * kDoubleSize;
__ ld(s0, MemOperand(sp, offset_to_argv + kCArgsSlotsSize));
}
__ mov(s0, a4); // 5th parameter in mips64 a4 (a4) register.
__ InitializeRootRegister();
......@@ -2210,7 +2203,7 @@ void RegExpExecStub::Generate(MacroAssembler* masm) {
// Isolates: note we add an additional parameter here (isolate pointer).
const int kRegExpExecuteArguments = 9;
const int kParameterRegisters = (kMipsAbi == kN64) ? 8 : 4;
const int kParameterRegisters = 8;
__ EnterExitFrame(false, kRegExpExecuteArguments - kParameterRegisters);
// Stack pointer now points to cell where return address is to be written.
......@@ -2231,58 +2224,28 @@ void RegExpExecStub::Generate(MacroAssembler* masm) {
// [sp + 1] - Argument 5
// [sp + 0] - saved ra
if (kMipsAbi == kN64) {
// Argument 9: Pass current isolate address.
__ li(a0, Operand(ExternalReference::isolate_address(isolate())));
__ sd(a0, MemOperand(sp, 1 * kPointerSize));
// Argument 8: Indicate that this is a direct call from JavaScript.
__ li(a7, Operand(1));
// Argument 7: Start (high end) of backtracking stack memory area.
__ li(a0, Operand(address_of_regexp_stack_memory_address));
__ ld(a0, MemOperand(a0, 0));
__ li(a2, Operand(address_of_regexp_stack_memory_size));
__ ld(a2, MemOperand(a2, 0));
__ daddu(a6, a0, a2);
// Argument 6: Set the number of capture registers to zero to force global
// regexps to behave as non-global. This does not affect non-global regexps.
__ mov(a5, zero_reg);
// Argument 5: static offsets vector buffer.
__ li(a4, Operand(
ExternalReference::address_of_static_offsets_vector(isolate())));
} else { // O32.
DCHECK(kMipsAbi == kO32);
// Argument 9: Pass current isolate address.
// CFunctionArgumentOperand handles MIPS stack argument slots.
__ li(a0, Operand(ExternalReference::isolate_address(isolate())));
__ sd(a0, MemOperand(sp, 5 * kPointerSize));
// Argument 8: Indicate that this is a direct call from JavaScript.
__ li(a0, Operand(1));
__ sd(a0, MemOperand(sp, 4 * kPointerSize));
// Argument 7: Start (high end) of backtracking stack memory area.
__ li(a0, Operand(address_of_regexp_stack_memory_address));
__ ld(a0, MemOperand(a0, 0));
__ li(a2, Operand(address_of_regexp_stack_memory_size));
__ ld(a2, MemOperand(a2, 0));
__ daddu(a0, a0, a2);
__ sd(a0, MemOperand(sp, 3 * kPointerSize));
// Argument 6: Set the number of capture registers to zero to force global
// regexps to behave as non-global. This does not affect non-global regexps.
__ mov(a0, zero_reg);
__ sd(a0, MemOperand(sp, 2 * kPointerSize));
// Argument 9: Pass current isolate address.
__ li(a0, Operand(ExternalReference::isolate_address(isolate())));
__ sd(a0, MemOperand(sp, 1 * kPointerSize));
// Argument 5: static offsets vector buffer.
__ li(a0, Operand(
ExternalReference::address_of_static_offsets_vector(isolate())));
__ sd(a0, MemOperand(sp, 1 * kPointerSize));
}
// Argument 8: Indicate that this is a direct call from JavaScript.
__ li(a7, Operand(1));
// Argument 7: Start (high end) of backtracking stack memory area.
__ li(a0, Operand(address_of_regexp_stack_memory_address));
__ ld(a0, MemOperand(a0, 0));
__ li(a2, Operand(address_of_regexp_stack_memory_size));
__ ld(a2, MemOperand(a2, 0));
__ daddu(a6, a0, a2);
// Argument 6: Set the number of capture registers to zero to force global
// regexps to behave as non-global. This does not affect non-global regexps.
__ mov(a5, zero_reg);
// Argument 5: static offsets vector buffer.
__ li(
a4,
Operand(ExternalReference::address_of_static_offsets_vector(isolate())));
// For arguments 4 and 3 get string length, calculate start of string data
// and calculate the shift of the index (0 for one_byte and 1 for two byte).
......
......@@ -45,27 +45,6 @@ enum ArchVariants {
#error Unknown endianness
#endif
// TODO(plind): consider deriving ABI from compiler flags or build system.
// ABI-dependent definitions are made with #define in simulator-mips64.h,
// so the ABI choice must be available to the pre-processor. However, in all
// other cases, we should use the enum AbiVariants with normal if statements.
#define MIPS_ABI_N64 1
// #define MIPS_ABI_O32 1
// The only supported Abi's are O32, and n64.
enum AbiVariants {
kO32,
kN64 // Use upper case N for 'n64' ABI to conform to style standard.
};
#ifdef MIPS_ABI_N64
static const AbiVariants kMipsAbi = kN64;
#else
static const AbiVariants kMipsAbi = kO32;
#endif
// TODO(plind): consider renaming these ...
#if(defined(__mips_hard_float) && __mips_hard_float != 0)
......@@ -1184,7 +1163,7 @@ class Instruction {
// MIPS assembly various constants.
// C/C++ argument slots size.
const int kCArgSlotCount = (kMipsAbi == kN64) ? 0 : 4;
const int kCArgSlotCount = 0;
// TODO(plind): below should be based on kPointerSize
// TODO(plind): find all usages and remove the needless instructions for n64.
......
......@@ -188,15 +188,9 @@ void Deoptimizer::TableEntryGenerator::Generate() {
__ ld(a0, MemOperand(fp, JavaScriptFrameConstants::kFunctionOffset));
// a2: bailout id already loaded.
// a3: code address or 0 already loaded.
if (kMipsAbi == kN64) {
// a4: already has fp-to-sp delta.
__ li(a5, Operand(ExternalReference::isolate_address(isolate())));
} else { // O32 abi.
// Pass four arguments in a0 to a3 and fifth & sixth arguments on stack.
__ sd(a4, CFunctionArgumentOperand(5)); // Fp-to-sp delta.
__ li(a5, Operand(ExternalReference::isolate_address(isolate())));
__ sd(a5, CFunctionArgumentOperand(6)); // Isolate.
}
// a4: already has fp-to-sp delta.
__ li(a5, Operand(ExternalReference::isolate_address(isolate())));
// Call Deoptimizer::New().
{
AllowExternalCallThatCantCauseGC scope(masm());
......
......@@ -4359,7 +4359,7 @@ void MacroAssembler::MovToFloatResult(DoubleRegister src) {
void MacroAssembler::MovToFloatParameters(DoubleRegister src1,
DoubleRegister src2) {
if (!IsMipsSoftFloatABI) {
const DoubleRegister fparg2 = (kMipsAbi == kN64) ? f13 : f14;
const DoubleRegister fparg2 = f13;
if (src2.is(f12)) {
DCHECK(!src1.is(fparg2));
Move(fparg2, src2);
......@@ -5950,8 +5950,7 @@ void MacroAssembler::JumpIfInstanceTypeIsNotSequentialOneByte(Register type,
Branch(failure, ne, scratch, Operand(kFlatOneByteStringTag));
}
static const int kRegisterPassedArguments = (kMipsAbi == kN64) ? 8 : 4;
static const int kRegisterPassedArguments = 8;
int MacroAssembler::CalculateStackPassedWords(int num_reg_arguments,
int num_double_arguments) {
......
......@@ -1160,7 +1160,7 @@ double Simulator::get_fpu_register_double(int fpureg) const {
// from a0-a3 or f12 and f13 (n64), or f14 (O32).
void Simulator::GetFpArgs(double* x, double* y, int32_t* z) {
if (!IsMipsSoftFloatABI) {
const int fparg2 = (kMipsAbi == kN64) ? 13 : 14;
const int fparg2 = 13;
*x = get_fpu_register_double(12);
*y = get_fpu_register_double(fparg2);
*z = static_cast<int32_t>(get_register(a2));
......@@ -2009,15 +2009,9 @@ void Simulator::SoftwareInterrupt(Instruction* instr) {
int64_t arg3 = get_register(a3);
int64_t arg4, arg5;
if (kMipsAbi == kN64) {
arg4 = get_register(a4); // Abi n64 register a4.
arg5 = get_register(a5); // Abi n64 register a5.
} else { // Abi O32.
int64_t* stack_pointer = reinterpret_cast<int64_t*>(get_register(sp));
// Args 4 and 5 are on the stack after the reserved space for args 0..3.
arg4 = stack_pointer[4];
arg5 = stack_pointer[5];
}
arg4 = get_register(a4); // Abi n64 register a4.
arg5 = get_register(a5); // Abi n64 register a5.
bool fp_call =
(redirection->type() == ExternalReference::BUILTIN_FP_FP_CALL) ||
(redirection->type() == ExternalReference::BUILTIN_COMPARE_CALL) ||
......@@ -4799,7 +4793,7 @@ void Simulator::CallInternal(byte* entry) {
int64_t Simulator::Call(byte* entry, int argument_count, ...) {
const int kRegisterPassedArguments = (kMipsAbi == kN64) ? 8 : 4;
const int kRegisterPassedArguments = 8;
va_list parameters;
va_start(parameters, argument_count);
// Set up arguments.
......@@ -4811,14 +4805,12 @@ int64_t Simulator::Call(byte* entry, int argument_count, ...) {
set_register(a2, va_arg(parameters, int64_t));
set_register(a3, va_arg(parameters, int64_t));
if (kMipsAbi == kN64) {
// Up to eight arguments passed in registers in N64 ABI.
// TODO(plind): N64 ABI calls these regs a4 - a7. Clarify this.
if (argument_count >= 5) set_register(a4, va_arg(parameters, int64_t));
if (argument_count >= 6) set_register(a5, va_arg(parameters, int64_t));
if (argument_count >= 7) set_register(a6, va_arg(parameters, int64_t));
if (argument_count >= 8) set_register(a7, va_arg(parameters, int64_t));
}
// Up to eight arguments passed in registers in N64 ABI.
// TODO(plind): N64 ABI calls these regs a4 - a7. Clarify this.
if (argument_count >= 5) set_register(a4, va_arg(parameters, int64_t));
if (argument_count >= 6) set_register(a5, va_arg(parameters, int64_t));
if (argument_count >= 7) set_register(a6, va_arg(parameters, int64_t));
if (argument_count >= 8) set_register(a7, va_arg(parameters, int64_t));
// Remaining arguments passed on stack.
int64_t original_stack = get_register(sp);
......@@ -4853,7 +4845,7 @@ int64_t Simulator::Call(byte* entry, int argument_count, ...) {
double Simulator::CallFP(byte* entry, double d0, double d1) {
if (!IsMipsSoftFloatABI) {
const FPURegister fparg2 = (kMipsAbi == kN64) ? f13 : f14;
const FPURegister fparg2 = f13;
set_fpu_register_double(f12, d0);
set_fpu_register_double(fparg2, d1);
} else {
......
......@@ -31,7 +31,6 @@ namespace internal {
// should act as a function matching the type arm_regexp_matcher.
// The fifth (or ninth) argument is a dummy that reserves the space used for
// the return address added by the ExitFrame in native calls.
#ifdef MIPS_ABI_N64
typedef int (*mips_regexp_matcher)(String* input,
int64_t start_offset,
const byte* input_start,
......@@ -48,26 +47,6 @@ typedef int (*mips_regexp_matcher)(String* input,
(FUNCTION_CAST<mips_regexp_matcher>(entry)(p0, p1, p2, p3, p4, p5, p6, p7, \
NULL, p8))
#else // O32 Abi.
typedef int (*mips_regexp_matcher)(String* input,
int32_t start_offset,
const byte* input_start,
const byte* input_end,
void* return_address,
int* output,
int32_t output_size,
Address stack_base,
int32_t direct_call,
Isolate* isolate);
#define CALL_GENERATED_REGEXP_CODE(isolate, entry, p0, p1, p2, p3, p4, p5, p6, \
p7, p8) \
(FUNCTION_CAST<mips_regexp_matcher>(entry)(p0, p1, p2, p3, NULL, p4, p5, p6, \
p7, p8))
#endif // MIPS_ABI_N64
// The stack limit beyond which we will throw stack overflow errors in
// generated code. Because generated code on mips uses the C stack, we
......@@ -516,18 +495,11 @@ class Simulator {
reinterpret_cast<int64_t*>(p3), reinterpret_cast<int64_t*>(p4)))
#ifdef MIPS_ABI_N64
#define CALL_GENERATED_REGEXP_CODE(isolate, entry, p0, p1, p2, p3, p4, p5, p6, \
p7, p8) \
static_cast<int>(Simulator::current(isolate)->Call( \
entry, 10, p0, p1, p2, p3, p4, reinterpret_cast<int64_t*>(p5), p6, p7, \
NULL, p8))
#else // Must be O32 Abi.
#define CALL_GENERATED_REGEXP_CODE(isolate, entry, p0, p1, p2, p3, p4, p5, p6, \
p7, p8) \
static_cast<int>(Simulator::current(isolate)->Call( \
entry, 10, p0, p1, p2, p3, NULL, p4, p5, p6, p7, p8))
#endif // MIPS_ABI_N64
// The simulator has its own stack. Thus it has a different stack limit from
......
......@@ -671,10 +671,7 @@ Handle<HeapObject> RegExpMacroAssemblerMIPS::GetCode(Handle<String> source) {
s3.bit() | s4.bit() | s5.bit() | s6.bit() | s7.bit() | fp.bit();
RegList argument_registers = a0.bit() | a1.bit() | a2.bit() | a3.bit();
if (kMipsAbi == kN64) {
// TODO(plind): Should probably alias a4-a7, for clarity.
argument_registers |= a4.bit() | a5.bit() | a6.bit() | a7.bit();
}
argument_registers |= a4.bit() | a5.bit() | a6.bit() | a7.bit();
__ MultiPush(argument_registers | registers_to_retain | ra.bit());
// Set frame pointer in space for it if this is not a direct call
......
......@@ -96,7 +96,6 @@ class RegExpMacroAssemblerMIPS: public NativeRegExpMacroAssembler {
void print_regexp_frame_constants();
private:
#if defined(MIPS_ABI_N64)
// Offsets from frame_pointer() of function parameters and stored registers.
static const int kFramePointer = 0;
......@@ -105,7 +104,7 @@ class RegExpMacroAssemblerMIPS: public NativeRegExpMacroAssembler {
static const int kStoredRegisters = kFramePointer;
// Return address (stored from link register, read into pc on return).
// TODO(plind): This 9 - is 8 s-regs (s0..s7) plus fp.
// TODO(plind): This 9 - is 8 s-regs (s0..s7) plus fp.
static const int kReturnAddress = kStoredRegisters + 9 * kPointerSize;
static const int kSecondaryReturnAddress = kReturnAddress + kPointerSize;
......@@ -131,43 +130,6 @@ class RegExpMacroAssemblerMIPS: public NativeRegExpMacroAssembler {
// First register address. Following registers are below it on the stack.
static const int kRegisterZero = kStringStartMinusOne - kPointerSize;
#elif defined(MIPS_ABI_O32)
// Offsets from frame_pointer() of function parameters and stored registers.
static const int kFramePointer = 0;
// Above the frame pointer - Stored registers and stack passed parameters.
// Registers s0 to s7, fp, and ra.
static const int kStoredRegisters = kFramePointer;
// Return address (stored from link register, read into pc on return).
static const int kReturnAddress = kStoredRegisters + 9 * kPointerSize;
static const int kSecondaryReturnAddress = kReturnAddress + kPointerSize;
// Stack frame header.
static const int kStackFrameHeader = kReturnAddress + kPointerSize;
// Stack parameters placed by caller.
static const int kRegisterOutput =
kStackFrameHeader + 4 * kPointerSize + kPointerSize;
static const int kNumOutputRegisters = kRegisterOutput + kPointerSize;
static const int kStackHighEnd = kNumOutputRegisters + kPointerSize;
static const int kDirectCall = kStackHighEnd + kPointerSize;
static const int kIsolate = kDirectCall + kPointerSize;
// Below the frame pointer.
// Register parameters stored by setup code.
static const int kInputEnd = kFramePointer - kPointerSize;
static const int kInputStart = kInputEnd - kPointerSize;
static const int kStartIndex = kInputStart - kPointerSize;
static const int kInputString = kStartIndex - kPointerSize;
// When adding local variables remember to push space for them in
// the frame in GetCode.
static const int kSuccessfulCaptures = kInputString - kPointerSize;
static const int kStringStartMinusOne = kSuccessfulCaptures - kPointerSize;
// First register address. Following registers are below it on the stack.
static const int kRegisterZero = kStringStartMinusOne - kPointerSize;
#else
# error "undefined MIPS ABI"
#endif
// Initial size of code buffer.
static const size_t kRegExpCodeSize = 1024;
......
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