[wasm-simd][liftoff] Implement v128.const

This implements v128.const for ia32, x64, arm, and arm64.

Moves one of the test case under the correct header.

Bug: v8:9909
Change-Id: I93eb179ac5fd0bc22e3dd5277f7d73699ac8b452
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2290623
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68806}

src/wasm/baseline/arm/liftoff-assembler-arm.h

@@ -3267,7 +3267,10 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
                                        const uint8_t imms[16]) {
-  bailout(kSimd, "s128.const");
+  uint64_t vals[2];
+  memcpy(vals, imms, sizeof(vals));
+  vmov(dst.low_fp(), Double(vals[0]));
+  vmov(dst.high_fp(), Double(vals[1]));
 }
 
 void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {

src/wasm/baseline/arm64/liftoff-assembler-arm64.h

@@ -2333,7 +2333,9 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
                                        const uint8_t imms[16]) {
-  bailout(kSimd, "s128.const");
+  uint64_t vals[2];
+  memcpy(vals, imms, sizeof(vals));
+  Movi(dst.fp().V16B(), vals[1], vals[0]);
 }
 
 void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {

src/wasm/baseline/ia32/liftoff-assembler-ia32.h

@@ -2827,7 +2827,17 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
                                        const uint8_t imms[16]) {
-  bailout(kSimd, "s128.const");
+  uint64_t vals[2];
+  memcpy(vals, imms, sizeof(vals));
+  TurboAssembler::Move(dst.fp(), vals[0]);
+
+  uint64_t high = vals[1];
+  Register tmp = GetUnusedRegister(RegClass::kGpReg, {}).gp();
+  TurboAssembler::Move(tmp, Immediate(high & 0xffff'ffff));
+  Pinsrd(dst.fp(), tmp, 2);
+
+  TurboAssembler::Move(tmp, Immediate(high >> 32));
+  Pinsrd(dst.fp(), tmp, 3);
 }
 
 void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {

src/wasm/baseline/x64/liftoff-assembler-x64.h

@@ -2549,7 +2549,11 @@ void LiftoffAssembler::emit_f64x2_le(LiftoffRegister dst, LiftoffRegister lhs,
 
 void LiftoffAssembler::emit_s128_const(LiftoffRegister dst,
                                        const uint8_t imms[16]) {
-  bailout(kSimd, "s128.const");
+  uint64_t vals[2];
+  memcpy(vals, imms, sizeof(vals));
+  TurboAssembler::Move(dst.fp(), vals[0]);
+  movq(kScratchRegister, vals[1]);
+  Pinsrq(dst.fp(), kScratchRegister, int8_t{1});
 }
 
 void LiftoffAssembler::emit_s128_not(LiftoffRegister dst, LiftoffRegister src) {

test/cctest/wasm/test-run-wasm-simd.cc

@@ -3695,6 +3695,15 @@ WASM_SIMD_TEST_NO_LOWERING(S128Const) {
     expected[i] = i;
   }
   RunSimdConstTest(execution_tier, lower_simd, expected);
+
+  // Keep the first 4 lanes as 0, set the remaining ones.
+  for (int i = 0; i < 0; i++) {
+    expected[i] = 0;
+  }
+  for (int i = 4; i < kSimd128Size; i++) {
+    expected[i] = i;
+  }
+  RunSimdConstTest(execution_tier, lower_simd, expected);
 }
 
 WASM_SIMD_TEST_NO_LOWERING(S128ConstAllZero) {
@@ -3704,12 +3713,6 @@ WASM_SIMD_TEST_NO_LOWERING(S128ConstAllZero) {
     expected[i] = 0;
   }
   RunSimdConstTest(execution_tier, lower_simd, expected);
-
-  // Keep the first 4 lanes as 0, set the remaining ones.
-  for (int i = 4; i < kSimd128Size; i++) {
-    expected[i] = i;
-  }
-  RunSimdConstTest(execution_tier, lower_simd, expected);
 }
 
 WASM_SIMD_TEST_NO_LOWERING(S128ConstAllOnes) {