[mips][wasm][liftoff] Detect SIMD NaNs for fuzzing

Port: 6f48b7b3

Bug: v8:11856
Change-Id: I1828e307caa55a31090e09b6e24b3d6317fdf6fe
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3007176
Auto-Submit: Liu yu <liuyu@loongson.cn>
Reviewed-by: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#75579}

src/wasm/baseline/mips/liftoff-assembler-mips.h

@@ -3019,6 +3019,13 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, FPURegister src,
   Sw(scratch, MemOperand(dst));
 }
 
+void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
+                                            Register tmp_gp,
+                                            DoubleRegister tmp_fp,
+                                            ValueKind lane_kind) {
+  UNIMPLEMENTED();
+}
+
 void LiftoffStackSlots::Construct(int param_slots) {
   DCHECK_LT(0, slots_.size());
   SortInPushOrder();

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

@@ -3187,6 +3187,13 @@ void LiftoffAssembler::emit_set_if_nan(Register dst, FPURegister src,
   Sd(scratch, MemOperand(dst));
 }
 
+void LiftoffAssembler::emit_s128_set_if_nan(Register dst, DoubleRegister src,
+                                            Register tmp_gp,
+                                            DoubleRegister tmp_fp,
+                                            ValueKind lane_kind) {
+  UNIMPLEMENTED();
+}
+
 void LiftoffStackSlots::Construct(int param_slots) {
   DCHECK_LT(0, slots_.size());
   SortInPushOrder();