PPC: [wasm-simd] Implement i32x4.dot_i16x8_s on PPC

Bug: v8:10583
Change-Id: I362b42cb14b9eae6d33d5410ce68e2974495247b
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2498657Reviewed-by: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#70766}

src/codegen/ppc/constants-ppc.h

@@ -1932,7 +1932,9 @@ using Instr = uint32_t;
   /* Vector Multiply-Low-Add Unsigned Halfword Modulo */ \
   V(vmladduhm, VMLADDUHM, 0x10000022)                    \
   /* Vector Select */                                    \
-  V(vsel, VSEL, 0x1000002A)
+  V(vsel, VSEL, 0x1000002A)                              \
+  /* Vector Multiply-Sum Signed Halfword Modulo */       \
+  V(vmsumshm, VMSUMSHM, 0x10000028)
 
 #define PPC_VA_OPCODE_UNUSED_LIST(V)                             \
   /* Vector Add Extended & write Carry Unsigned Quadword */      \
@@ -1947,8 +1949,6 @@ using Instr = uint32_t;
   V(vmhraddshs, VMHRADDSHS, 0x10000021)                          \
   /* Vector Multiply-Sum Mixed Byte Modulo */                    \
   V(vmsummbm, VMSUMMBM, 0x10000025)                              \
-  /* Vector Multiply-Sum Signed Halfword Modulo */               \
-  V(vmsumshm, VMSUMSHM, 0x10000028)                              \
   /* Vector Multiply-Sum Signed Halfword Saturate */             \
   V(vmsumshs, VMSUMSHS, 0x10000029)                              \
   /* Vector Multiply-Sum Unsigned Byte Modulo */                 \

src/compiler/backend/ppc/code-generator-ppc.cc

@@ -3467,6 +3467,12 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ mfvsrd(i.OutputRegister(), kScratchDoubleReg);
       break;
     }
+    case kPPC_I32x4DotI16x8S: {
+      __ vxor(kScratchDoubleReg, kScratchDoubleReg, kScratchDoubleReg);
+      __ vmsumshm(i.OutputSimd128Register(), i.InputSimd128Register(0),
+                  i.InputSimd128Register(1), kScratchDoubleReg);
+      break;
+    }
     case kPPC_StoreCompressTagged: {
       ASSEMBLE_STORE_INTEGER(StoreTaggedField, StoreTaggedFieldX);
       break;

src/compiler/backend/ppc/instruction-codes-ppc.h

@@ -288,6 +288,7 @@ namespace compiler {
   V(PPC_I32x4UConvertI16x8Low)       \
   V(PPC_I32x4UConvertI16x8High)      \
   V(PPC_I32x4BitMask)                \
+  V(PPC_I32x4DotI16x8S)              \
   V(PPC_F32x4Qfma)                   \
   V(PPC_F32x4Qfms)                   \
   V(PPC_I16x8Splat)                  \

src/compiler/backend/ppc/instruction-scheduler-ppc.cc

@@ -213,6 +213,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kPPC_I32x4UConvertI16x8Low:
     case kPPC_I32x4UConvertI16x8High:
     case kPPC_I32x4BitMask:
+    case kPPC_I32x4DotI16x8S:
     case kPPC_I16x8Splat:
     case kPPC_I16x8ExtractLaneU:
     case kPPC_I16x8ExtractLaneS:

src/compiler/backend/ppc/instruction-selector-ppc.cc

@@ -2185,6 +2185,7 @@ void InstructionSelector::VisitInt64AbsWithOverflow(Node* node) {
   V(I32x4GeS)              \
   V(I32x4GtU)              \
   V(I32x4GeU)              \
+  V(I32x4DotI16x8S)        \
   V(I16x8Add)              \
   V(I16x8AddHoriz)         \
   V(I16x8Sub)              \
@@ -2460,8 +2461,6 @@ void InstructionSelector::VisitF64x2Pmin(Node* node) { UNIMPLEMENTED(); }
 
 void InstructionSelector::VisitF64x2Pmax(Node* node) { UNIMPLEMENTED(); }
 
-void InstructionSelector::VisitI32x4DotI16x8S(Node* node) { UNIMPLEMENTED(); }
-
 // static
 MachineOperatorBuilder::Flags
 InstructionSelector::SupportedMachineOperatorFlags() {