[ptr-compr][arm64] TurboFan support for compressing stores

Similar to x64's CL (https://chromium-review.googlesource.com/c/v8/v8/+/1459638)

Bug: v8:7703
Change-Id: I4b4e06ccdb9f428559dfb6b74e8ac149f955745c
Reviewed-on: https://chromium-review.googlesource.com/c/1467181Reviewed-by: Ross McIlroy <rmcilroy@chromium.org>
Reviewed-by: Igor Sheludko <ishell@chromium.org>
Reviewed-by: Jaroslav Sevcik <jarin@chromium.org>
Commit-Queue: Santiago Aboy Solanes <solanes@chromium.org>
Cr-Commit-Position: refs/heads/master@{#59591}

src/compiler/backend/arm64/code-generator-arm64.cc

@@ -858,7 +858,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       auto ool = new (zone()) OutOfLineRecordWrite(
           this, object, index, value, scratch0, scratch1, mode,
           DetermineStubCallMode(), &unwinding_info_writer_);
-      __ Str(value, MemOperand(object, index));
+      __ StoreTaggedField(value, MemOperand(object, index));
       __ CheckPageFlagSet(object, scratch0,
                           MemoryChunk::kPointersFromHereAreInterestingMask,
                           ool->entry());
@@ -1589,6 +1589,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
     case kArm64StrQ:
       __ Str(i.InputSimd128Register(0), i.MemoryOperand(1));
       break;
+    case kArm64StrCompressTagged:
+      __ StoreTaggedField(i.InputOrZeroRegister64(0), i.MemoryOperand(1));
+      break;
     case kArm64DsbIsb:
       __ Dsb(FullSystem, BarrierAll);
       __ Isb();

src/compiler/backend/arm64/instruction-codes-arm64.h

@@ -162,6 +162,7 @@ namespace compiler {
   V(Arm64LdrDecompressTaggedPointer)        \
   V(Arm64LdrDecompressAnyTagged)            \
   V(Arm64Str)                               \
+  V(Arm64StrCompressTagged)                 \
   V(Arm64DsbIsb)                            \
   V(Arm64F32x4Splat)                        \
   V(Arm64F32x4ExtractLane)                  \

src/compiler/backend/arm64/instruction-scheduler-arm64.cc

@@ -310,6 +310,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArm64Strh:
     case kArm64StrW:
     case kArm64Str:
+    case kArm64StrCompressTagged:
     case kArm64DsbIsb:
       return kHasSideEffect;
 

src/compiler/backend/arm64/instruction-selector-arm64.cc

@@ -741,9 +741,18 @@ void InstructionSelector::VisitStore(Node* node) {
         opcode = kArm64StrW;
         immediate_mode = kLoadStoreImm32;
         break;
+#ifdef V8_COMPRESS_POINTERS
+      case MachineRepresentation::kTaggedSigned:
+      case MachineRepresentation::kTaggedPointer:
+      case MachineRepresentation::kTagged:
+        opcode = kArm64StrCompressTagged;
+        immediate_mode = kLoadStoreImm32;
+        break;
+#else
       case MachineRepresentation::kTaggedSigned:   // Fall through.
       case MachineRepresentation::kTaggedPointer:  // Fall through.
       case MachineRepresentation::kTagged:         // Fall through.
+#endif
       case MachineRepresentation::kWord64:
         opcode = kArm64Str;
         immediate_mode = kLoadStoreImm64;