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Commit d8f78c0a authored by Nico Hartmann's avatar Nico Hartmann Committed by V8 LUCI CQ
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Revert "[assembler][arm64][arm][ia32] Add more Assembler::CodeComment" 

This reverts commit 2588380d.

Reason for revert: https://ci.chromium.org/ui/p/v8/builders/ci/V8%20Arm%20-%20debug%20builder/34664/overview

Original change's description:
> [assembler][arm64][arm][ia32] Add more Assembler::CodeComment
>
> Use more code comments to better document generated assembler code.
> This CL also attaches a CodeComment to FrameScope.
>
> Change-Id: I45afc3e4078dc161316b877fbbd1ae8bcd6e821d
> Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2964392
> Reviewed-by: Nico Hartmann <nicohartmann@chromium.org>
> Reviewed-by: Victor Gomes <victorgomes@chromium.org>
> Commit-Queue: Camillo Bruni <cbruni@chromium.org>
> Cr-Commit-Position: refs/heads/master@{#75277}

Change-Id: I6d36535ca96133cc83b3d6194a3d53889f735499
No-Presubmit: true
No-Tree-Checks: true
No-Try: true
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2972826Reviewed-by: 's avatarNico Hartmann <nicohartmann@chromium.org>
Commit-Queue: Nico Hartmann <nicohartmann@chromium.org>
Cr-Commit-Position: refs/heads/master@{#75278}
parent 2588380d
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Showing with 722 additions and 1020 deletions
src/baseline/arm/baseline-assembler-arm-inl.h
View file @ d8f78c0a
......@@ -116,21 +116,21 @@ void BaselineAssembler::JumpIfNotSmi(Register value, Label* target,
void BaselineAssembler::CallBuiltin(Builtin builtin) {
// __ CallBuiltin(static_cast<int>(builtin));
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
ScratchRegisterScope temps(this);
Register temp = temps.AcquireScratch();
__ LoadEntryFromBuiltin(builtin, temp);
__ Call(temp);
__ RecordComment("]");
}
void BaselineAssembler::TailCallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("tail call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
ScratchRegisterScope temps(this);
Register temp = temps.AcquireScratch();
__ LoadEntryFromBuiltin(builtin, temp);
__ Jump(temp);
__ RecordComment("]");
}
void BaselineAssembler::TestAndBranch(Register value, int mask, Condition cc,
......@@ -360,7 +360,6 @@ void BaselineAssembler::LoadByteField(Register output, Register source,
}
void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
Smi value) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope temps(this);
Register tmp = temps.AcquireScratch();
__ mov(tmp, Operand(value));
......@@ -369,7 +368,6 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
DCHECK(!AreAliased(target, value));
__ str(value, FieldMemOperand(target, offset));
__ RecordWriteField(target, offset, value, kLRHasNotBeenSaved,
......@@ -383,7 +381,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -406,7 +403,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -429,7 +425,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
Label fallthrough;
if (case_value_base > 0) {
__ sub(reg, reg, Operand(case_value_base));
......@@ -456,32 +451,30 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ Push(params_size, kInterpreterAccumulatorRegister);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ Push(params_size, kInterpreterAccumulatorRegister);
__ LoadContext(kContextRegister);
__ LoadFunction(kJSFunctionRegister);
__ Push(kJSFunctionRegister);
__ CallRuntime(Runtime::kBytecodeBudgetInterruptFromBytecode, 1);
__ LoadContext(kContextRegister);
__ LoadFunction(kJSFunctionRegister);
__ Push(kJSFunctionRegister);
__ CallRuntime(Runtime::kBytecodeBudgetInterruptFromBytecode, 1);
__ Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ Bind(&skip_interrupt_label);
__ Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
BaselineAssembler::ScratchRegisterScope temps(&basm);
Register actual_params_size = temps.AcquireScratch();
......
src/baseline/arm/baseline-compiler-arm-inl.h
View file @ d8f78c0a
......@@ -27,7 +27,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -77,6 +77,7 @@ void BaselineCompiler::PrologueFillFrame() {
__ masm()->sub(scratch, scratch, Operand(1), SetCC);
__ masm()->b(gt, &loop);
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
......
src/baseline/arm64/baseline-assembler-arm64-inl.h
View file @ d8f78c0a
......@@ -433,7 +433,6 @@ void BaselineAssembler::LoadByteField(Register output, Register source,
}
void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
Smi value) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope temps(this);
Register tmp = temps.AcquireScratch();
__ Mov(tmp, Operand(value));
......@@ -442,7 +441,6 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
__ StoreTaggedField(value, FieldMemOperand(target, offset));
__ RecordWriteField(target, offset, value, kLRHasNotBeenSaved,
SaveFPRegsMode::kIgnore);
......@@ -455,7 +453,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -478,7 +475,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -506,7 +502,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
Label fallthrough;
if (case_value_base > 0) {
__ Sub(reg, reg, Immediate(case_value_base));
......@@ -540,17 +535,16 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ masm()->Push(params_size, kInterpreterAccumulatorRegister);
......@@ -561,9 +555,10 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
__ masm()->Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
}
BaselineAssembler::ScratchRegisterScope temps(&basm);
Register actual_params_size = temps.AcquireScratch();
......
src/baseline/arm64/baseline-compiler-arm64-inl.h
View file @ d8f78c0a
......@@ -14,7 +14,6 @@ namespace baseline {
#define __ basm_.
void BaselineCompiler::Prologue() {
ASM_CODE_COMMENT(&masm_);
// Enter the frame here, since CallBuiltin will override lr.
__ masm()->EnterFrame(StackFrame::BASELINE);
DCHECK_EQ(kJSFunctionRegister, kJavaScriptCallTargetRegister);
......@@ -29,7 +28,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -99,10 +98,10 @@ void BaselineCompiler::PrologueFillFrame() {
__ masm()->Subs(scratch, scratch, 1);
__ masm()->B(gt, &loop);
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
ASM_CODE_COMMENT(&masm_);
__ masm()->Add(x15, sp,
RoundUp(InterpreterFrameConstants::kFixedFrameSizeFromFp +
bytecode_->frame_size(),
......
src/baseline/baseline-compiler.cc
View file @ d8f78c0a
......@@ -517,15 +517,16 @@ void BaselineCompiler::VerifyFrame() {
#ifdef V8_TRACE_UNOPTIMIZED
void BaselineCompiler::TraceBytecode(Runtime::FunctionId function_id) {
if (!FLAG_trace_baseline_exec) return;
ASM_CODE_COMMENT_STRING(&masm_,
function_id == Runtime::kTraceUnoptimizedBytecodeEntry
? "Trace bytecode entry"
: "Trace bytecode exit");
__ RecordComment(function_id == Runtime::kTraceUnoptimizedBytecodeEntry
? "[ Trace bytecode entry"
: "[ Trace bytecode exit");
SaveAccumulatorScope accumulator_scope(&basm_);
CallRuntime(function_id, bytecode_,
Smi::FromInt(BytecodeArray::kHeaderSize - kHeapObjectTag +
iterator().current_offset()),
kInterpreterAccumulatorRegister);
__ RecordComment("]");
}
#endif
......
src/baseline/ia32/baseline-assembler-ia32-inl.h
View file @ d8f78c0a
......@@ -116,15 +116,15 @@ void BaselineAssembler::JumpIfNotSmi(Register value, Label* target,
}
void BaselineAssembler::CallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
__ Call(__ EntryFromBuiltinAsOperand(builtin));
__ RecordComment("]");
}
void BaselineAssembler::TailCallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("tail call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
__ jmp(__ EntryFromBuiltinAsOperand(builtin));
__ RecordComment("]");
}
void BaselineAssembler::TestAndBranch(Register value, int mask, Condition cc,
......@@ -336,8 +336,8 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
}
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
BaselineAssembler::ScratchRegisterScope scratch_scope(this);
Register scratch = scratch_scope.AcquireScratch();
DCHECK(!AreAliased(scratch, target, value));
......@@ -353,7 +353,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -369,7 +368,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
DCHECK(!AreAliased(feedback_cell, weight));
......@@ -388,7 +386,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scope(this);
Register table = scope.AcquireScratch();
DCHECK(!AreAliased(reg, table));
......@@ -413,16 +410,16 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ Push(params_size, kInterpreterAccumulatorRegister);
......@@ -432,9 +429,10 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
__ Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
}
BaselineAssembler::ScratchRegisterScope scope(&basm);
Register scratch = scope.AcquireScratch();
......
src/baseline/ia32/baseline-compiler-ia32-inl.h
View file @ d8f78c0a
......@@ -26,7 +26,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -74,6 +74,7 @@ void BaselineCompiler::PrologueFillFrame() {
__ masm()->dec(scratch);
__ masm()->j(greater, &loop);
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
......
src/baseline/mips/baseline-assembler-mips-inl.h
View file @ d8f78c0a
......@@ -112,19 +112,19 @@ void BaselineAssembler::JumpIfNotSmi(Register value, Label* target,
}
void BaselineAssembler::CallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
Register temp = t9;
__ LoadEntryFromBuiltin(builtin, temp);
__ Call(temp);
__ RecordComment("]");
}
void BaselineAssembler::TailCallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("tail call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
Register temp = t9;
__ LoadEntryFromBuiltin(builtin, temp);
__ Jump(temp);
__ RecordComment("]");
}
void BaselineAssembler::TestAndBranch(Register value, int mask, Condition cc,
......@@ -357,7 +357,6 @@ void BaselineAssembler::LoadByteField(Register output, Register source,
}
void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
Smi value) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope temps(this);
Register scratch = temps.AcquireScratch();
__ li(scratch, Operand(value));
......@@ -366,7 +365,6 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
__ Sw(value, FieldMemOperand(target, offset));
ScratchRegisterScope temps(this);
Register scratch = temps.AcquireScratch();
......@@ -381,7 +379,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -401,7 +398,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
}
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -424,7 +420,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
Label fallthrough;
if (case_value_base > 0) {
__ Subu(reg, reg, Operand(case_value_base));
......@@ -456,17 +451,16 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ masm()->Push(params_size, kInterpreterAccumulatorRegister);
......@@ -477,9 +471,10 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
__ masm()->Pop(params_size, kInterpreterAccumulatorRegister);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
}
BaselineAssembler::ScratchRegisterScope temps(&basm);
Register actual_params_size = temps.AcquireScratch();
......
src/baseline/mips/baseline-compiler-mips-inl.h
View file @ d8f78c0a
......@@ -15,7 +15,6 @@ namespace baseline {
#define __ basm_.
void BaselineCompiler::Prologue() {
ASM_CODE_COMMENT(&masm_);
__ masm()->EnterFrame(StackFrame::BASELINE);
DCHECK_EQ(kJSFunctionRegister, kJavaScriptCallTargetRegister);
int max_frame_size = bytecode_->frame_size() + max_call_args_;
......@@ -27,7 +26,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -59,10 +58,10 @@ void BaselineCompiler::PrologueFillFrame() {
__ masm()->Sw(kInterpreterAccumulatorRegister, MemOperand(sp, i * 4));
}
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
ASM_CODE_COMMENT(&masm_);
__ masm()->Addu(kScratchReg, sp,
Operand(InterpreterFrameConstants::kFixedFrameSizeFromFp +
bytecode_->frame_size()));
......
src/baseline/mips64/baseline-assembler-mips64-inl.h
View file @ d8f78c0a
......@@ -110,19 +110,19 @@ void BaselineAssembler::JumpIfNotSmi(Register value, Label* target,
}
void BaselineAssembler::CallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
Register temp = t9;
__ LoadEntryFromBuiltin(builtin, temp);
__ Call(temp);
__ RecordComment("]");
}
void BaselineAssembler::TailCallBuiltin(Builtin builtin) {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("tail call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
Register temp = t9;
__ LoadEntryFromBuiltin(builtin, temp);
__ Jump(temp);
__ RecordComment("]");
}
void BaselineAssembler::TestAndBranch(Register value, int mask, Condition cc,
......@@ -355,7 +355,6 @@ void BaselineAssembler::LoadByteField(Register output, Register source,
}
void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
Smi value) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope temps(this);
Register scratch = temps.AcquireScratch();
__ li(scratch, Operand(value));
......@@ -364,7 +363,6 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
__ Sd(value, FieldMemOperand(target, offset));
ScratchRegisterScope temps(this);
Register scratch = temps.AcquireScratch();
......@@ -379,7 +377,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -399,7 +396,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
}
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -422,7 +418,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
Label fallthrough;
if (case_value_base > 0) {
__ Dsubu(reg, reg, Operand(case_value_base));
......@@ -454,17 +449,16 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ masm()->Push(params_size, kInterpreterAccumulatorRegister);
......@@ -475,9 +469,10 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
__ masm()->Pop(params_size, kInterpreterAccumulatorRegister);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
}
BaselineAssembler::ScratchRegisterScope temps(&basm);
Register actual_params_size = temps.AcquireScratch();
......
src/baseline/mips64/baseline-compiler-mips64-inl.h
View file @ d8f78c0a
......@@ -15,7 +15,6 @@ namespace baseline {
#define __ basm_.
void BaselineCompiler::Prologue() {
ASM_CODE_COMMENT(&masm_);
__ masm()->EnterFrame(StackFrame::BASELINE);
DCHECK_EQ(kJSFunctionRegister, kJavaScriptCallTargetRegister);
int max_frame_size = bytecode_->frame_size() + max_call_args_;
......@@ -27,7 +26,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -59,10 +58,10 @@ void BaselineCompiler::PrologueFillFrame() {
__ masm()->Sd(kInterpreterAccumulatorRegister, MemOperand(sp, i * 8));
}
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
ASM_CODE_COMMENT(&masm_);
__ masm()->Daddu(kScratchReg, sp,
Operand(InterpreterFrameConstants::kFixedFrameSizeFromFp +
bytecode_->frame_size()));
......
src/baseline/riscv64/baseline-assembler-riscv64-inl.h
View file @ d8f78c0a
......@@ -112,11 +112,11 @@ void BaselineAssembler::CallBuiltin(Builtin builtin) {
if (masm()->options().short_builtin_calls) {
__ CallBuiltin(builtin);
} else {
ASM_CODE_COMMENT_STRING(masm_,
__ CommentForOffHeapTrampoline("call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
Register temp = t6;
__ LoadEntryFromBuiltin(builtin, temp);
__ Call(temp);
__ RecordComment("]");
}
}
......@@ -125,13 +125,13 @@ void BaselineAssembler::TailCallBuiltin(Builtin builtin) {
// Generate pc-relative jump.
__ TailCallBuiltin(builtin);
} else {
ASM_CODE_COMMENT_STRING(
masm_, __ CommentForOffHeapTrampoline("tail call", builtin));
__ RecordCommentForOffHeapTrampoline(builtin);
// t6 be used for function call in RISCV64
// For example 'jalr t6' or 'jal t6'
Register temp = t6;
__ LoadEntryFromBuiltin(builtin, temp);
__ Jump(temp);
__ RecordComment("]");
}
}
......@@ -469,7 +469,6 @@ void BaselineAssembler::LoadByteField(Register output, Register source,
}
void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
Smi value) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope temps(this);
Register tmp = temps.AcquireScratch();
__ li(tmp, Operand(value));
......@@ -480,7 +479,6 @@ void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
// FIXME(riscv64): riscv64 don't implement pointer compressed
ASM_CODE_COMMENT(masm_);
__ Sd(value, FieldMemOperand(target, offset));
__ RecordWriteField(target, offset, value, kRAHasNotBeenSaved,
SaveFPRegsMode::kIgnore);
......@@ -494,7 +492,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -516,7 +513,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -535,7 +531,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
}
void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
ASM_CODE_COMMENT(&masm_);
if (SmiValuesAre31Bits()) {
__ Add32(lhs, lhs, Operand(rhs));
} else {
......@@ -545,7 +540,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
Label fallthrough;
if (case_value_base > 0) {
__ Sub64(reg, reg, Operand(case_value_base));
......@@ -586,17 +580,16 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ masm()->Push(params_size, kInterpreterAccumulatorRegister);
......@@ -607,9 +600,10 @@ void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
__ masm()->Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
}
BaselineAssembler::ScratchRegisterScope temps(&basm);
Register actual_params_size = temps.AcquireScratch();
......
src/baseline/riscv64/baseline-compiler-riscv64-inl.h
View file @ d8f78c0a
......@@ -14,7 +14,6 @@ namespace baseline {
#define __ basm_.
void BaselineCompiler::Prologue() {
ASM_CODE_COMMENT(&masm_);
// Enter the frame here, since CallBuiltin will override lr.
__ masm()->EnterFrame(StackFrame::BASELINE);
DCHECK_EQ(kJSFunctionRegister, kJavaScriptCallTargetRegister);
......@@ -26,7 +25,7 @@ void BaselineCompiler::Prologue() {
}
void BaselineCompiler::PrologueFillFrame() {
ASM_CODE_COMMENT(&masm_);
__ RecordComment("[ Fill frame");
// Inlined register frame fill
interpreter::Register new_target_or_generator_register =
bytecode_->incoming_new_target_or_generator_register();
......@@ -91,10 +90,10 @@ void BaselineCompiler::PrologueFillFrame() {
}
__ masm()->Branch(&loop, gt, scratch, Operand(1));
}
__ RecordComment("]");
}
void BaselineCompiler::VerifyFrameSize() {
ASM_CODE_COMMENT(&masm_);
__ masm()->Add64(kScratchReg, sp,
RoundUp(InterpreterFrameConstants::kFixedFrameSizeFromFp +
bytecode_->frame_size(),
......
src/baseline/x64/baseline-assembler-x64-inl.h
View file @ d8f78c0a
......@@ -344,7 +344,6 @@ void BaselineAssembler::StoreTaggedSignedField(Register target, int offset,
void BaselineAssembler::StoreTaggedFieldWithWriteBarrier(Register target,
int offset,
Register value) {
ASM_CODE_COMMENT(masm_);
Register scratch = WriteBarrierDescriptor::SlotAddressRegister();
DCHECK(!AreAliased(target, value, scratch));
__ StoreTaggedField(FieldOperand(target, offset), value);
......@@ -358,7 +357,6 @@ void BaselineAssembler::StoreTaggedFieldNoWriteBarrier(Register target,
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
int32_t weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -374,7 +372,6 @@ void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
void BaselineAssembler::AddToInterruptBudgetAndJumpIfNotExceeded(
Register weight, Label* skip_interrupt_label) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scratch_scope(this);
Register feedback_cell = scratch_scope.AcquireScratch();
LoadFunction(feedback_cell);
......@@ -399,7 +396,6 @@ void BaselineAssembler::AddSmi(Register lhs, Smi rhs) {
void BaselineAssembler::Switch(Register reg, int case_value_base,
Label** labels, int num_labels) {
ASM_CODE_COMMENT(masm_);
ScratchRegisterScope scope(this);
Register table = scope.AcquireScratch();
Label fallthrough, jump_table;
......@@ -423,30 +419,29 @@ void BaselineAssembler::Switch(Register reg, int case_value_base,
#define __ basm.
void BaselineAssembler::EmitReturn(MacroAssembler* masm) {
ASM_CODE_COMMENT(masm);
BaselineAssembler basm(masm);
Register weight = BaselineLeaveFrameDescriptor::WeightRegister();
Register params_size = BaselineLeaveFrameDescriptor::ParamsSizeRegister();
{
ASM_CODE_COMMENT_STRING(masm, "Update Interrupt Budget");
__ RecordComment("[ Update Interrupt Budget");
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ Push(params_size, kInterpreterAccumulatorRegister);
Label skip_interrupt_label;
__ AddToInterruptBudgetAndJumpIfNotExceeded(weight, &skip_interrupt_label);
{
__ masm()->SmiTag(params_size);
__ Push(params_size, kInterpreterAccumulatorRegister);
__ LoadContext(kContextRegister);
__ Push(MemOperand(rbp, InterpreterFrameConstants::kFunctionOffset));
__ CallRuntime(Runtime::kBytecodeBudgetInterruptFromBytecode, 1);
__ LoadContext(kContextRegister);
__ Push(MemOperand(rbp, InterpreterFrameConstants::kFunctionOffset));
__ CallRuntime(Runtime::kBytecodeBudgetInterruptFromBytecode, 1);
__ Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ Bind(&skip_interrupt_label);
__ Pop(kInterpreterAccumulatorRegister, params_size);
__ masm()->SmiUntag(params_size);
}
__ RecordComment("]");
__ Bind(&skip_interrupt_label);
BaselineAssembler::ScratchRegisterScope scope(&basm);
Register scratch = scope.AcquireScratch();
......
src/builtins/arm/builtins-arm.cc
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src/builtins/arm64/builtins-arm64.cc
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src/builtins/ia32/builtins-ia32.cc
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src/builtins/mips/builtins-mips.cc
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src/builtins/mips64/builtins-mips64.cc
View file @ d8f78c0a
......@@ -989,7 +989,7 @@ static void AdvanceBytecodeOffsetOrReturn(MacroAssembler* masm,
static void LoadOptimizationStateAndJumpIfNeedsProcessing(
MacroAssembler* masm, Register optimization_state, Register feedback_vector,
Label* has_optimized_code_or_marker) {
ASM_CODE_COMMENT(masm);
__ RecordComment("[ Check optimization state");
Register scratch = t2;
__ Lw(optimization_state,
FieldMemOperand(feedback_vector, FeedbackVector::kFlagsOffset));
......@@ -997,12 +997,12 @@ static void LoadOptimizationStateAndJumpIfNeedsProcessing(
scratch, optimization_state,
Operand(FeedbackVector::kHasOptimizedCodeOrCompileOptimizedMarkerMask));
__ Branch(has_optimized_code_or_marker, ne, scratch, Operand(zero_reg));
__ RecordComment("]");
}
static void MaybeOptimizeCodeOrTailCallOptimizedCodeSlot(
MacroAssembler* masm, Register optimization_state,
Register feedback_vector) {
ASM_CODE_COMMENT(masm);
Label maybe_has_optimized_code;
// Check if optimized code marker is available
{
......@@ -1071,61 +1071,61 @@ void Builtins::Generate_BaselineOutOfLinePrologue(MacroAssembler* masm) {
FeedbackVector::kInvocationCountOffset));
}
__ RecordComment("[ Frame Setup");
FrameScope frame_scope(masm, StackFrame::MANUAL);
{
ASM_CODE_COMMENT_STRING(masm, "Frame Setup");
// Normally the first thing we'd do here is Push(ra, fp), but we already
// entered the frame in BaselineCompiler::Prologue, as we had to use the
// value lr before the call to this BaselineOutOfLinePrologue builtin.
Register callee_context = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kCalleeContext);
Register callee_js_function = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kClosure);
__ Push(callee_context, callee_js_function);
DCHECK_EQ(callee_js_function, kJavaScriptCallTargetRegister);
DCHECK_EQ(callee_js_function, kJSFunctionRegister);
Register argc = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kJavaScriptCallArgCount);
// We'll use the bytecode for both code age/OSR resetting, and pushing onto
// the frame, so load it into a register.
Register bytecodeArray = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kInterpreterBytecodeArray);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset
// are 8-bit fields next to each other, so we could just optimize by writing
// a 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOsrNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ Sh(zero_reg, FieldMemOperand(bytecodeArray,
BytecodeArray::kOsrNestingLevelOffset));
__ Push(argc, bytecodeArray);
// Normally the first thing we'd do here is Push(ra, fp), but we already
// entered the frame in BaselineCompiler::Prologue, as we had to use the
// value lr before the call to this BaselineOutOfLinePrologue builtin.
Register callee_context = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kCalleeContext);
Register callee_js_function = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kClosure);
__ Push(callee_context, callee_js_function);
DCHECK_EQ(callee_js_function, kJavaScriptCallTargetRegister);
DCHECK_EQ(callee_js_function, kJSFunctionRegister);
Register argc = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kJavaScriptCallArgCount);
// We'll use the bytecode for both code age/OSR resetting, and pushing onto
// the frame, so load it into a register.
Register bytecodeArray = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kInterpreterBytecodeArray);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset
// are 8-bit fields next to each other, so we could just optimize by writing
// a 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOsrNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ Sh(zero_reg,
FieldMemOperand(bytecodeArray, BytecodeArray::kOsrNestingLevelOffset));
__ Push(argc, bytecodeArray);
// Baseline code frames store the feedback vector where interpreter would
// store the bytecode offset.
if (FLAG_debug_code) {
UseScratchRegisterScope temps(masm);
Register invocation_count = temps.Acquire();
__ GetObjectType(feedback_vector, invocation_count, invocation_count);
__ Assert(eq, AbortReason::kExpectedFeedbackVector, invocation_count,
Operand(FEEDBACK_VECTOR_TYPE));
}
// Our stack is currently aligned. We have have to push something along with
// the feedback vector to keep it that way -- we may as well start
// initialising the register frame.
// TODO(v8:11429,leszeks): Consider guaranteeing that this call leaves
// `undefined` in the accumulator register, to skip the load in the baseline
// code.
__ Push(feedback_vector);
// Baseline code frames store the feedback vector where interpreter would
// store the bytecode offset.
if (FLAG_debug_code) {
UseScratchRegisterScope temps(masm);
Register invocation_count = temps.Acquire();
__ GetObjectType(feedback_vector, invocation_count, invocation_count);
__ Assert(eq, AbortReason::kExpectedFeedbackVector, invocation_count,
Operand(FEEDBACK_VECTOR_TYPE));
}
// Our stack is currently aligned. We have have to push something along with
// the feedback vector to keep it that way -- we may as well start
// initialising the register frame.
// TODO(v8:11429,leszeks): Consider guaranteeing that this call leaves
// `undefined` in the accumulator register, to skip the load in the baseline
// code.
__ Push(feedback_vector);
__ RecordComment("]");
__ RecordComment("[ Stack/interrupt check");
Label call_stack_guard;
Register frame_size = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kStackFrameSize);
{
ASM_CODE_COMMENT_STRING(masm, "Stack/interrupt check");
// Stack check. This folds the checks for both the interrupt stack limit
// check and the real stack limit into one by just checking for the
// interrupt limit. The interrupt limit is either equal to the real stack
......@@ -1139,6 +1139,7 @@ void Builtins::Generate_BaselineOutOfLinePrologue(MacroAssembler* masm) {
MacroAssembler::StackLimitKind::kInterruptStackLimit);
__ Branch(&call_stack_guard, Uless, sp_minus_frame_size,
Operand(interrupt_limit));
__ RecordComment("]");
}
// Do "fast" return to the caller pc in ra.
......@@ -1147,27 +1148,29 @@ void Builtins::Generate_BaselineOutOfLinePrologue(MacroAssembler* masm) {
__ bind(&has_optimized_code_or_marker);
{
ASM_CODE_COMMENT_STRING(masm, "Optimized marker check");
UseScratchRegisterScope temps(masm);
temps.Exclude(optimization_state);
// Ensure the optimization_state is not allocated again.
__ RecordComment("[ Optimized marker check");
// Drop the frame created by the baseline call.
__ Pop(ra, fp);
MaybeOptimizeCodeOrTailCallOptimizedCodeSlot(masm, optimization_state,
feedback_vector);
__ Trap();
__ RecordComment("]");
}
__ bind(&call_stack_guard);
{
ASM_CODE_COMMENT_STRING(masm, "Stack/interrupt call");
FrameScope frame_scope(masm, StackFrame::INTERNAL);
__ RecordComment("[ Stack/interrupt call");
// Save incoming new target or generator
__ Push(kJavaScriptCallNewTargetRegister);
__ SmiTag(frame_size);
__ Push(frame_size);
__ CallRuntime(Runtime::kStackGuardWithGap);
__ Pop(kJavaScriptCallNewTargetRegister);
__ RecordComment("]");
}
__ Ret();
temps.Exclude(kScratchReg.bit() | kScratchReg2.bit());
......@@ -1421,9 +1424,11 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
__ break_(0xCC);
}
static void GenerateInterpreterPushArgs(MacroAssembler* masm, Register num_args,
Register start_address,
Register scratch, Register scratch2) {
static void Generate_InterpreterPushArgs(MacroAssembler* masm,
Register num_args,
Register start_address,
Register scratch,
Register scratch2) {
// Find the address of the last argument.
__ Dsubu(scratch, num_args, Operand(1));
__ dsll(scratch, scratch, kPointerSizeLog2);
......@@ -1462,7 +1467,7 @@ void Builtins::Generate_InterpreterPushArgsThenCallImpl(
}
// This function modifies a2, t0 and a4.
GenerateInterpreterPushArgs(masm, a3, a2, a4, t0);
Generate_InterpreterPushArgs(masm, a3, a2, a4, t0);
if (receiver_mode == ConvertReceiverMode::kNullOrUndefined) {
__ PushRoot(RootIndex::kUndefinedValue);
......@@ -1512,7 +1517,7 @@ void Builtins::Generate_InterpreterPushArgsThenConstructImpl(
}
// Push the arguments, This function modifies t0, a4 and a5.
GenerateInterpreterPushArgs(masm, a0, a4, a5, t0);
Generate_InterpreterPushArgs(masm, a0, a4, a5, t0);
// Push a slot for the receiver.
__ push(zero_reg);
......
src/builtins/ppc/builtins-ppc.cc
View file @ d8f78c0a
......@@ -1272,10 +1272,10 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
__ bkpt(0); // Should not return.
}
static void GenerateInterpreterPushArgs(MacroAssembler* masm, Register num_args,
Register start_address,
Register scratch) {
ASM_CODE_COMMENT(masm);
static void Generate_InterpreterPushArgs(MacroAssembler* masm,
Register num_args,
Register start_address,
Register scratch) {
__ subi(scratch, num_args, Operand(1));
__ ShiftLeftImm(scratch, scratch, Operand(kSystemPointerSizeLog2));
__ sub(start_address, start_address, scratch);
......@@ -1313,7 +1313,7 @@ void Builtins::Generate_InterpreterPushArgsThenCallImpl(
}
// Push the arguments.
GenerateInterpreterPushArgs(masm, r6, r5, r7);
Generate_InterpreterPushArgs(masm, r6, r5, r7);
if (receiver_mode == ConvertReceiverMode::kNullOrUndefined) {
__ PushRoot(RootIndex::kUndefinedValue);
......@@ -1363,7 +1363,7 @@ void Builtins::Generate_InterpreterPushArgsThenConstructImpl(
}
// Push the arguments.
GenerateInterpreterPushArgs(masm, r3, r7, r8);
Generate_InterpreterPushArgs(masm, r3, r7, r8);
// Push a slot for the receiver to be constructed.
__ li(r0, Operand::Zero());
......
src/builtins/riscv64/builtins-riscv64.cc
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src/builtins/s390/builtins-s390.cc
View file @ d8f78c0a
......@@ -1318,10 +1318,10 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
__ bkpt(0); // Should not return.
}
static void GenerateInterpreterPushArgs(MacroAssembler* masm, Register num_args,
Register start_address,
Register scratch) {
ASM_CODE_COMMENT(masm);
static void Generate_InterpreterPushArgs(MacroAssembler* masm,
Register num_args,
Register start_address,
Register scratch) {
__ SubS64(scratch, num_args, Operand(1));
__ ShiftLeftU64(scratch, scratch, Operand(kSystemPointerSizeLog2));
__ SubS64(start_address, start_address, scratch);
......@@ -1358,7 +1358,7 @@ void Builtins::Generate_InterpreterPushArgsThenCallImpl(
}
// Push the arguments.
GenerateInterpreterPushArgs(masm, r5, r4, r6);
Generate_InterpreterPushArgs(masm, r5, r4, r6);
if (receiver_mode == ConvertReceiverMode::kNullOrUndefined) {
__ PushRoot(RootIndex::kUndefinedValue);
......@@ -1408,7 +1408,7 @@ void Builtins::Generate_InterpreterPushArgsThenConstructImpl(
}
// Push the arguments. r4 and r5 will be modified.
GenerateInterpreterPushArgs(masm, r2, r6, r7);
Generate_InterpreterPushArgs(masm, r2, r6, r7);
// Push a slot for the receiver to be constructed.
__ mov(r0, Operand::Zero());
......
src/builtins/x64/builtins-x64.cc
View file @ d8f78c0a
......@@ -1361,9 +1361,10 @@ void Builtins::Generate_InterpreterEntryTrampoline(MacroAssembler* masm) {
__ int3(); // Should not return.
}
static void GenerateInterpreterPushArgs(MacroAssembler* masm, Register num_args,
Register start_address,
Register scratch) {
static void Generate_InterpreterPushArgs(MacroAssembler* masm,
Register num_args,
Register start_address,
Register scratch) {
ASM_CODE_COMMENT(masm);
// Find the argument with lowest address.
__ movq(scratch, num_args);
......@@ -1409,7 +1410,7 @@ void Builtins::Generate_InterpreterPushArgsThenCallImpl(
}
// rbx and rdx will be modified.
GenerateInterpreterPushArgs(masm, rcx, rbx, rdx);
Generate_InterpreterPushArgs(masm, rcx, rbx, rdx);
// Push "undefined" as the receiver arg if we need to.
if (receiver_mode == ConvertReceiverMode::kNullOrUndefined) {
......@@ -1470,7 +1471,7 @@ void Builtins::Generate_InterpreterPushArgsThenConstructImpl(
}
// rcx and r8 will be modified.
GenerateInterpreterPushArgs(masm, rax, rcx, r8);
Generate_InterpreterPushArgs(masm, rax, rcx, r8);
// Push slot for the receiver to be constructed.
__ Push(Immediate(0));
......@@ -1680,47 +1681,46 @@ void Builtins::Generate_BaselineOutOfLinePrologue(MacroAssembler* masm) {
__ incl(
FieldOperand(feedback_vector, FeedbackVector::kInvocationCountOffset));
{
ASM_CODE_COMMENT_STRING(masm, "Frame Setup");
// Save the return address, so that we can push it to the end of the newly
// set-up frame once we're done setting it up.
__ PopReturnAddressTo(return_address);
FrameScope frame_scope(masm, StackFrame::MANUAL);
{
ASM_CODE_COMMENT_STRING(masm, "Frame Setup");
__ EnterFrame(StackFrame::BASELINE);
__ Push(descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kCalleeContext)); // Callee's
// context.
Register callee_js_function = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kClosure);
DCHECK_EQ(callee_js_function, kJavaScriptCallTargetRegister);
DCHECK_EQ(callee_js_function, kJSFunctionRegister);
__ Push(callee_js_function); // Callee's JS function.
__ Push(descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::
kJavaScriptCallArgCount)); // Actual argument
// count.
// We'll use the bytecode for both code age/OSR resetting, and pushing
// onto the frame, so load it into a register.
Register bytecode_array = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kInterpreterBytecodeArray);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset
// are 8-bit fields next to each other, so we could just optimize by
// writing a 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOsrNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ movw(
FieldOperand(bytecode_array, BytecodeArray::kOsrNestingLevelOffset),
Immediate(0));
__ Push(bytecode_array);
__ EnterFrame(StackFrame::BASELINE);
__ Push(descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kCalleeContext)); // Callee's
// context.
Register callee_js_function = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kClosure);
DCHECK_EQ(callee_js_function, kJavaScriptCallTargetRegister);
DCHECK_EQ(callee_js_function, kJSFunctionRegister);
__ Push(callee_js_function); // Callee's JS function.
__ Push(descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::
kJavaScriptCallArgCount)); // Actual argument
// count.
// We'll use the bytecode for both code age/OSR resetting, and pushing onto
// the frame, so load it into a register.
Register bytecode_array = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kInterpreterBytecodeArray);
// Reset code age and the OSR arming. The OSR field and BytecodeAgeOffset
// are 8-bit fields next to each other, so we could just optimize by writing
// a 16-bit. These static asserts guard our assumption is valid.
STATIC_ASSERT(BytecodeArray::kBytecodeAgeOffset ==
BytecodeArray::kOsrNestingLevelOffset + kCharSize);
STATIC_ASSERT(BytecodeArray::kNoAgeBytecodeAge == 0);
__ movw(FieldOperand(bytecode_array, BytecodeArray::kOsrNestingLevelOffset),
Immediate(0));
__ Push(bytecode_array);
// Baseline code frames store the feedback vector where interpreter would
// store the bytecode offset.
__ Push(feedback_vector);
}
// Baseline code frames store the feedback vector where interpreter would
// store the bytecode offset.
__ Push(feedback_vector);
}
Register new_target = descriptor.GetRegisterParameter(
BaselineOutOfLinePrologueDescriptor::kJavaScriptCallNewTarget);
......@@ -1744,6 +1744,7 @@ void Builtins::Generate_BaselineOutOfLinePrologue(MacroAssembler* masm) {
__ cmpq(kScratchRegister,
__ StackLimitAsOperand(StackLimitKind::kInterruptStackLimit));
__ j(below, &call_stack_guard);
__ RecordComment("]");
}
// Push the return address back onto the stack for return.
......
src/codegen/arm/assembler-arm.cc
View file @ d8f78c0a
......@@ -5354,9 +5354,9 @@ void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
while (buffer_space() <= needed_space) GrowBuffer();
{
ASM_CODE_COMMENT_STRING(this, "Constant Pool");
// Block recursive calls to CheckConstPool.
BlockConstPoolScope block_const_pool(this);
RecordComment("[ Constant Pool");
RecordConstPool(size);
Label size_check;
......@@ -5421,6 +5421,8 @@ void Assembler::CheckConstPool(bool force_emit, bool require_jump) {
first_const_pool_32_use_ = -1;
RecordComment("]");
DCHECK_EQ(size, SizeOfCodeGeneratedSince(&size_check));
if (after_pool.is_linked()) {
......
src/codegen/arm/macro-assembler-arm.cc
View file @ d8f78c0a
This diff is collapsed.
src/codegen/arm64/assembler-arm64.cc
View file @ d8f78c0a
......@@ -4493,8 +4493,8 @@ void Assembler::RecordVeneerPool(int location_offset, int size) {
void Assembler::EmitVeneers(bool force_emit, bool need_protection,
size_t margin) {
ASM_CODE_COMMENT_STRING(this, "Veneers");
BlockPoolsScope scope(this, PoolEmissionCheck::kSkip);
RecordComment("[ Veneers");
// The exact size of the veneer pool must be recorded (see the comment at the
// declaration site of RecordConstPool()), but computing the number of
......@@ -4587,11 +4587,12 @@ void Assembler::EmitVeneers(bool force_emit, bool need_protection,
RecordVeneerPool(veneer_pool_relocinfo_loc, pool_size);
bind(&end);
RecordComment("]");
}
void Assembler::CheckVeneerPool(bool force_emit, bool require_jump,
size_t margin) {
ASM_CODE_COMMENT(this);
// There is nothing to do if there are no pending veneer pool entries.
if (unresolved_branches_.empty()) {
DCHECK_EQ(next_veneer_pool_check_, kMaxInt);
......
src/codegen/arm64/macro-assembler-arm64.cc
View file @ d8f78c0a
This diff is collapsed.
src/codegen/ia32/macro-assembler-ia32.cc
View file @ d8f78c0a
This diff is collapsed.
src/codegen/macro-assembler.h
View file @ d8f78c0a
......@@ -83,13 +83,7 @@ static constexpr int kMaxCParameters = 256;
class V8_NODISCARD FrameScope {
public:
explicit FrameScope(TurboAssembler* tasm, StackFrame::Type type)
:
#ifdef V8_CODE_COMMENTS
comment_(tasm, frame_name(type)),
#endif
tasm_(tasm),
type_(type),
old_has_frame_(tasm->has_frame()) {
: tasm_(tasm), type_(type), old_has_frame_(tasm->has_frame()) {
tasm->set_has_frame(true);
if (type != StackFrame::MANUAL && type_ != StackFrame::NONE) {
tasm->EnterFrame(type);
......@@ -104,30 +98,9 @@ class V8_NODISCARD FrameScope {
}
private:
#ifdef V8_CODE_COMMENTS
const char* frame_name(StackFrame::Type type) {
switch (type) {
case StackFrame::NONE:
return "Frame: NONE";
case StackFrame::MANUAL:
return "Frame: MANUAL";
#define FRAME_TYPE_CASE(type, field) \
case StackFrame::type: \
return "Frame: " #type;
STACK_FRAME_TYPE_LIST(FRAME_TYPE_CASE)
#undef FRAME_TYPE_CASE
case StackFrame::NUMBER_OF_TYPES:
break;
}
return "Frame";
}
Assembler::CodeComment comment_;
#endif // V8_CODE_COMMENTS
TurboAssembler* tasm_;
StackFrame::Type const type_;
bool const old_has_frame_;
StackFrame::Type type_;
bool old_has_frame_;
};
class V8_NODISCARD FrameAndConstantPoolScope {
......
src/codegen/x64/macro-assembler-x64.cc
View file @ d8f78c0a
......@@ -3015,11 +3015,8 @@ void MacroAssembler::StackOverflowCheck(
void MacroAssembler::InvokePrologue(Register expected_parameter_count,
Register actual_parameter_count,
Label* done, InvokeType type) {
if (expected_parameter_count != actual_parameter_count) {
ASM_CODE_COMMENT(this);
if (expected_parameter_count == actual_parameter_count) {
Move(rax, actual_parameter_count);
return;
}
Label regular_invoke;
// If the expected parameter count is equal to the adaptor sentinel, no need
// to push undefined value as arguments.
......@@ -3079,6 +3076,9 @@ void MacroAssembler::InvokePrologue(Register expected_parameter_count,
int3(); // This should be unreachable.
}
bind(&regular_invoke);
} else {
Move(rax, actual_parameter_count);
}
}
void MacroAssembler::CallDebugOnFunctionCall(Register fun, Register new_target,
......
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