Commit d77e016e authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd][liftoff][ia32][x64] Fix swizzle

Swizzle codegen was incorrect when mask == dst, which can happen since
we did not pin dst. We can simplify this by using scratch register for
mask.

This bug was encountered while trying to run the spec test simd-lane.js.

Bug: v8:10835
Change-Id: Ie9c8f383bb6f336f9b74955fb7a9aee0e6774bf2
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2388743Reviewed-by: 's avatarBill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#69657}
parent b7704fb1
...@@ -2707,8 +2707,7 @@ void LiftoffAssembler::emit_s8x16_shuffle(LiftoffRegister dst, ...@@ -2707,8 +2707,7 @@ void LiftoffAssembler::emit_s8x16_shuffle(LiftoffRegister dst,
void LiftoffAssembler::emit_s8x16_swizzle(LiftoffRegister dst, void LiftoffAssembler::emit_s8x16_swizzle(LiftoffRegister dst,
LiftoffRegister lhs, LiftoffRegister lhs,
LiftoffRegister rhs) { LiftoffRegister rhs) {
XMMRegister mask = XMMRegister mask = liftoff::kScratchDoubleReg;
GetUnusedRegister(kFpReg, LiftoffRegList::ForRegs(lhs, rhs)).fp();
// Out-of-range indices should return 0, add 112 (0x70) so that any value > 15 // Out-of-range indices should return 0, add 112 (0x70) so that any value > 15
// saturates to 128 (top bit set), so pshufb will zero that lane. // saturates to 128 (top bit set), so pshufb will zero that lane.
TurboAssembler::Move(mask, uint32_t{0x70707070}); TurboAssembler::Move(mask, uint32_t{0x70707070});
......
...@@ -2336,8 +2336,7 @@ void LiftoffAssembler::emit_s8x16_shuffle(LiftoffRegister dst, ...@@ -2336,8 +2336,7 @@ void LiftoffAssembler::emit_s8x16_shuffle(LiftoffRegister dst,
void LiftoffAssembler::emit_s8x16_swizzle(LiftoffRegister dst, void LiftoffAssembler::emit_s8x16_swizzle(LiftoffRegister dst,
LiftoffRegister lhs, LiftoffRegister lhs,
LiftoffRegister rhs) { LiftoffRegister rhs) {
XMMRegister mask = XMMRegister mask = kScratchDoubleReg;
GetUnusedRegister(kFpReg, LiftoffRegList::ForRegs(lhs, rhs)).fp();
// Out-of-range indices should return 0, add 112 (0x70) so that any value > 15 // Out-of-range indices should return 0, add 112 (0x70) so that any value > 15
// saturates to 128 (top bit set), so pshufb will zero that lane. // saturates to 128 (top bit set), so pshufb will zero that lane.
TurboAssembler::Move(mask, uint32_t{0x70707070}); TurboAssembler::Move(mask, uint32_t{0x70707070});
......
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