ppc: Unify Memory Operation 7

Change-Id: Ieeb437abf3ebc59461ee828aeb6c65e06fdb17fb
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2950241
Commit-Queue: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Auto-Submit: Junliang Yan <junyan@redhat.com>
Reviewed-by: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75057}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -2814,7 +2814,7 @@ void TurboAssembler::LoadF32(DoubleRegister dst, const MemOperand& mem,
   GenerateMemoryOperation(dst, mem, lfs, lfsx);
 }
 
-void MacroAssembler::LoadF64WithUpdate(DoubleRegister dst,
+void TurboAssembler::LoadF64WithUpdate(DoubleRegister dst,
                                        const MemOperand& mem,
                                        Register scratch) {
   GenerateMemoryOperation(dst, mem, lfdu, lfdux);
@@ -2833,56 +2833,24 @@ void TurboAssembler::LoadSimd128(Simd128Register dst, const MemOperand& mem) {
 
 void TurboAssembler::StoreF64(DoubleRegister src, const MemOperand& mem,
                               Register scratch) {
-  Register base = mem.ra();
-  int offset = mem.offset();
-
-  if (!is_int16(offset)) {
-    mov(scratch, Operand(offset));
-    stfdx(src, MemOperand(base, scratch));
-  } else {
-    stfd(src, mem);
-  }
+  GenerateMemoryOperation(src, mem, stfd, stfdx);
 }
 
 void TurboAssembler::StoreF64WithUpdate(DoubleRegister src,
                                         const MemOperand& mem,
                                         Register scratch) {
-  Register base = mem.ra();
-  int offset = mem.offset();
-
-  if (!is_int16(offset)) {
-    mov(scratch, Operand(offset));
-    stfdux(src, MemOperand(base, scratch));
-  } else {
-    stfdu(src, mem);
-  }
+  GenerateMemoryOperation(src, mem, stfdu, stfdux);
 }
 
 void TurboAssembler::StoreF32(DoubleRegister src, const MemOperand& mem,
                               Register scratch) {
-  Register base = mem.ra();
-  int offset = mem.offset();
-
-  if (!is_int16(offset)) {
-    mov(scratch, Operand(offset));
-    stfsx(src, MemOperand(base, scratch));
-  } else {
-    stfs(src, mem);
-  }
+  GenerateMemoryOperation(src, mem, stfs, stfsx);
 }
 
 void TurboAssembler::StoreF32WithUpdate(DoubleRegister src,
                                         const MemOperand& mem,
                                         Register scratch) {
-  Register base = mem.ra();
-  int offset = mem.offset();
-
-  if (!is_int16(offset)) {
-    mov(scratch, Operand(offset));
-    stfsux(src, MemOperand(base, scratch));
-  } else {
-    stfsu(src, mem);
-  }
+  GenerateMemoryOperation(src, mem, stfsu, stfsux);
 }
 
 void TurboAssembler::StoreSimd128(Simd128Register src, const MemOperand& mem) {

src/codegen/ppc/macro-assembler-ppc.h

@@ -138,10 +138,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
     mov(kRootRegister, Operand(isolate_root));
   }
 
-  void LoadF64(DoubleRegister dst, const MemOperand& mem,
-               Register scratch = no_reg);
-  void LoadF32(DoubleRegister dst, const MemOperand& mem,
-               Register scratch = no_reg);
   void LoadDoubleLiteral(DoubleRegister result, Double value, Register scratch);
   void LoadSimd128(Simd128Register dst, const MemOperand& mem);
 
@@ -150,22 +146,9 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   // load an SMI value <value> to GPR <dst>
   void LoadSmiLiteral(Register dst, Smi smi);
 
-  void LoadF32WithUpdate(DoubleRegister dst, const MemOperand& mem,
-                         Register scratch = no_reg);
   void LoadPC(Register dst);
   void ComputeCodeStartAddress(Register dst);
 
-  void StoreF64(DoubleRegister src, const MemOperand& mem,
-                Register scratch = no_reg);
-  void StoreF64WithUpdate(DoubleRegister src, const MemOperand& mem,
-                          Register scratch = no_reg);
-
-  void StoreF32(DoubleRegister src, const MemOperand& mem,
-                Register scratch = no_reg);
-  void StoreF32WithUpdate(DoubleRegister src, const MemOperand& mem,
-                          Register scratch = no_reg);
-  void StoreSimd128(Simd128Register src, const MemOperand& mem);
-
   void Cmpi(Register src1, const Operand& src2, Register scratch,
             CRegister cr = cr7);
   void Cmpli(Register src1, const Operand& src2, Register scratch,
@@ -694,10 +677,27 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void DecompressAnyTagged(Register destination, MemOperand field_operand);
   void DecompressAnyTagged(Register destination, Register source);
 
-  void LoadU64WithUpdate(Register dst, const MemOperand& mem,
+  void LoadF64(DoubleRegister dst, const MemOperand& mem,
+               Register scratch = no_reg);
+  void LoadF32(DoubleRegister dst, const MemOperand& mem,
+               Register scratch = no_reg);
+
+  void StoreF32(DoubleRegister src, const MemOperand& mem,
+                Register scratch = no_reg);
+  void StoreF64(DoubleRegister src, const MemOperand& mem,
+                Register scratch = no_reg);
+
+  void LoadF32WithUpdate(DoubleRegister dst, const MemOperand& mem,
                          Register scratch = no_reg);
-  void StoreU64WithUpdate(Register src, const MemOperand& mem,
+  void LoadF64WithUpdate(DoubleRegister dst, const MemOperand& mem,
+                         Register scratch = no_reg);
+
+  void StoreF32WithUpdate(DoubleRegister src, const MemOperand& mem,
                           Register scratch = no_reg);
+  void StoreF64WithUpdate(DoubleRegister src, const MemOperand& mem,
+                          Register scratch = no_reg);
+
+  void StoreSimd128(Simd128Register src, const MemOperand& mem);
 
   void LoadU64(Register dst, const MemOperand& mem, Register scratch = no_reg);
   void LoadU32(Register dst, const MemOperand& mem, Register scratch = no_reg);
@@ -711,6 +711,11 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
   void StoreU16(Register src, const MemOperand& mem, Register scratch);
   void StoreU8(Register src, const MemOperand& mem, Register scratch);
 
+  void LoadU64WithUpdate(Register dst, const MemOperand& mem,
+                         Register scratch = no_reg);
+  void StoreU64WithUpdate(Register src, const MemOperand& mem,
+                          Register scratch = no_reg);
+
  private:
   static const int kSmiShift = kSmiTagSize + kSmiShiftSize;
 
@@ -786,9 +791,6 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
 
   // load a literal double value <value> to FPR <result>
 
-  void LoadF64WithUpdate(DoubleRegister dst, const MemOperand& mem,
-                         Register scratch = no_reg);
-
   void Cmplwi(Register src1, const Operand& src2, Register scratch,
               CRegister cr = cr7);
   void And(Register ra, Register rs, const Operand& rb, RCBit rc = LeaveRC);