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Commit d3fe5ac7 authored by Aseem Garg's avatar Aseem Garg Committed by Commit Bot
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[wasm] add simd horiz and reduce to interpreter 

This CL adds simd select, addHoriz, shuffle, anyTrue and all true to the
interpreter. It also gets rid of SIMD_COMPILED_AND_LOWERED_TEST and
SIMD_COMPILED_TEST macros.

R=gdeepti@chromium.org
BUG=v8:6020

Change-Id: I44abbcaddc3223a95c79ccc65ae9c6bf1a911c5d
Reviewed-on: https://chromium-review.googlesource.com/1119258
Commit-Queue: Aseem Garg <aseemgarg@chromium.org>
Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#54116}
parent 90da229f
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Inline Side-by-side
Showing with 135 additions and 64 deletions
src/wasm/function-body-decoder-impl.h
View file @ d3fe5ac7
......@@ -1160,6 +1160,7 @@ class WasmDecoder : public Decoder {
FOREACH_SIMD_1_OPERAND_1_PARAM_OPCODE(DECLARE_OPCODE_CASE)
return {1, 1};
FOREACH_SIMD_1_OPERAND_2_PARAM_OPCODE(DECLARE_OPCODE_CASE)
FOREACH_SIMD_MASK_OPERAND_OPCODE(DECLARE_OPCODE_CASE)
return {2, 1};
default: {
sig = WasmOpcodes::Signature(opcode);
......
src/wasm/wasm-interpreter.cc
View file @ d3fe5ac7
......@@ -1917,6 +1917,67 @@ class ThreadImpl {
PACK_CASE(I8x16UConvertI16x8, int8, i16x8, int16, 16, uint8_t, int8_t,
true)
#undef PACK_CASE
case kExprS128Select: {
int4 v2 = Pop().to_s128().to_i32x4();
int4 v1 = Pop().to_s128().to_i32x4();
int4 bool_val = Pop().to_s128().to_i32x4();
int4 res;
for (size_t i = 0; i < 4; ++i) {
res.val[i] = v2.val[i] ^ ((v1.val[i] ^ v2.val[i]) & bool_val.val[i]);
}
Push(WasmValue(Simd128(res)));
return true;
}
#define ADD_HORIZ_CASE(op, name, stype, count) \
case kExpr##op: { \
WasmValue v2 = Pop(); \
WasmValue v1 = Pop(); \
stype s1 = v1.to_s128().to_##name(); \
stype s2 = v2.to_s128().to_##name(); \
stype res; \
for (size_t i = 0; i < count / 2; ++i) { \
res.val[i] = s1.val[i * 2] + s1.val[i * 2 + 1]; \
res.val[i + count / 2] = s2.val[i * 2] + s2.val[i * 2 + 1]; \
} \
Push(WasmValue(Simd128(res))); \
return true; \
}
ADD_HORIZ_CASE(I32x4AddHoriz, i32x4, int4, 4)
ADD_HORIZ_CASE(F32x4AddHoriz, f32x4, float4, 4)
ADD_HORIZ_CASE(I16x8AddHoriz, i16x8, int8, 8)
#undef ADD_HORIZ_CASE
case kExprS8x16Shuffle: {
Simd8x16ShuffleImmediate<Decoder::kNoValidate> imm(decoder,
code->at(pc));
len += 16;
int16 v2 = Pop().to_s128().to_i8x16();
int16 v1 = Pop().to_s128().to_i8x16();
int16 res;
for (size_t i = 0; i < kSimd128Size; ++i) {
int lane = imm.shuffle[i];
res.val[i] =
lane < kSimd128Size ? v1.val[lane] : v2.val[lane - kSimd128Size];
}
Push(WasmValue(Simd128(res)));
return true;
}
#define REDUCTION_CASE(op, name, stype, count, operation) \
case kExpr##op: { \
stype s = Pop().to_s128().to_##name(); \
int32_t res = s.val[0]; \
for (size_t i = 1; i < count; ++i) { \
res = res operation static_cast<int32_t>(s.val[i]); \
} \
Push(WasmValue(res)); \
return true; \
}
REDUCTION_CASE(S1x4AnyTrue, i32x4, int4, 4, |)
REDUCTION_CASE(S1x4AllTrue, i32x4, int4, 4, &)
REDUCTION_CASE(S1x8AnyTrue, i16x8, int8, 8, |)
REDUCTION_CASE(S1x8AllTrue, i16x8, int8, 8, &)
REDUCTION_CASE(S1x16AnyTrue, i8x16, int16, 16, |)
REDUCTION_CASE(S1x16AllTrue, i8x16, int16, 16, &)
#undef REDUCTION_CASE
default:
return false;
}
......
test/cctest/cctest.status
View file @ d3fe5ac7
......@@ -416,6 +416,41 @@
'test-run-wasm-simd/RunWasm_SimdLoadStoreLoad_simd_turbofan': [SKIP],
'test-run-wasm-simd/RunWasm_SimdLoadStoreLoad_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_SimdLoadStoreLoad_simd_lowered': [SKIP],
'test-run-wasm-simd/RunWasm_I32x4AddHoriz_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_I16x8AddHoriz_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_F32x4AddHoriz_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4Dup_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4ZipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4ZipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4UnzipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4UnzipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4TransposeLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4TransposeRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x2Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S32x4Irregular_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8Dup_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8ZipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8ZipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8UnzipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8UnzipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8TransposeLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8TransposeRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x4Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x2Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S16x8Irregular_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16Dup_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16ZipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16ZipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16UnzipLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16UnzipRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16TransposeLeft_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16TransposeRight_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x8Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x4Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x2Reverse_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16Irregular_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16Blend_interpreter': [SKIP],
'test-run-wasm-simd/RunWasm_S8x16Concat_interpreter': [SKIP],
}], # 'arch == mips or arch == mips64'
......
test/cctest/wasm/test-run-wasm-simd.cc
View file @ d3fe5ac7
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