Commit d1d7e153 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

S390 [liftoff]: Implement simd rounding average

Change-Id: I709253796b8493cf365f21247c367974ffbb3106
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3440435Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#78954}
parent b05a8458
......@@ -5372,12 +5372,14 @@ SIMD_BINOP_LIST_VRR_B(EMIT_SIMD_BINOP_VRR_B)
V(I16x8MinU, vmnl, 0, 0, 1) \
V(I16x8MaxS, vmx, 0, 0, 1) \
V(I16x8MaxU, vmxl, 0, 0, 1) \
V(I16x8RoundingAverageU, vavgl, 0, 0, 1) \
V(I8x16Add, va, 0, 0, 0) \
V(I8x16Sub, vs, 0, 0, 0) \
V(I8x16MinS, vmn, 0, 0, 0) \
V(I8x16MinU, vmnl, 0, 0, 0) \
V(I8x16MaxS, vmx, 0, 0, 0) \
V(I8x16MaxU, vmxl, 0, 0, 0) \
V(I8x16RoundingAverageU, vavgl, 0, 0, 0) \
V(S128And, vn, 0, 0, 0) \
V(S128Or, vo, 0, 0, 0) \
V(S128Xor, vx, 0, 0, 0) \
......
......@@ -1256,6 +1256,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
V(I16x8Shl, const Operand&) \
V(I16x8ShrS, const Operand&) \
V(I16x8ShrU, const Operand&) \
V(I16x8RoundingAverageU, Simd128Register) \
V(I8x16Add, Simd128Register) \
V(I8x16Sub, Simd128Register) \
V(I8x16Eq, Simd128Register) \
......@@ -1274,6 +1275,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
V(I8x16Shl, const Operand&) \
V(I8x16ShrS, const Operand&) \
V(I8x16ShrU, const Operand&) \
V(I8x16RoundingAverageU, Simd128Register) \
V(S128And, Simd128Register) \
V(S128Or, Simd128Register) \
V(S128Xor, Simd128Register) \
......
......@@ -2621,6 +2621,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
V(I16x8Shl, Register) \
V(I16x8ShrS, Register) \
V(I16x8ShrU, Register) \
V(I16x8RoundingAverageU, Simd128Register) \
V(I8x16Add, Simd128Register) \
V(I8x16Sub, Simd128Register) \
V(I8x16Eq, Simd128Register) \
......@@ -2636,6 +2637,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
V(I8x16Shl, Register) \
V(I8x16ShrS, Register) \
V(I8x16ShrU, Register) \
V(I8x16RoundingAverageU, Simd128Register) \
V(S128And, Simd128Register) \
V(S128Or, Simd128Register) \
V(S128Xor, Simd128Register) \
......@@ -2796,19 +2798,6 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
#undef EMIT_SIMD_QFM
#undef SIMD_QFM_LIST
// vector binops
case kS390_I16x8RoundingAverageU: {
__ vavgl(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1), Condition(0), Condition(0),
Condition(1));
break;
}
case kS390_I8x16RoundingAverageU: {
__ vavgl(i.OutputSimd128Register(), i.InputSimd128Register(0),
i.InputSimd128Register(1), Condition(0), Condition(0),
Condition(0));
break;
}
// vector unary ops
case kS390_F32x4RecipApprox: {
__ mov(kScratchReg, Operand(1));
......
......@@ -2323,6 +2323,7 @@ void LiftoffAssembler::emit_smi_check(Register obj, Label* target,
V(i16x8_shl, I16x8Shl, gp) \
V(i16x8_shr_s, I16x8ShrS, gp) \
V(i16x8_shr_u, I16x8ShrU, gp) \
V(i16x8_rounding_average_u, I16x8RoundingAverageU, fp) \
V(i8x16_add, I8x16Add, fp) \
V(i8x16_sub, I8x16Sub, fp) \
V(i8x16_eq, I8x16Eq, fp) \
......@@ -2338,6 +2339,7 @@ void LiftoffAssembler::emit_smi_check(Register obj, Label* target,
V(i8x16_shl, I8x16Shl, gp) \
V(i8x16_shr_s, I8x16ShrS, gp) \
V(i8x16_shr_u, I8x16ShrU, gp) \
V(i8x16_rounding_average_u, I8x16RoundingAverageU, fp) \
V(s128_and, S128And, fp) \
V(s128_or, S128Or, fp) \
V(s128_xor, S128Xor, fp) \
......@@ -2735,18 +2737,6 @@ void LiftoffAssembler::emit_i32x4_trunc_sat_f64x2_u_zero(LiftoffRegister dst,
bailout(kSimd, "i32x4.trunc_sat_f64x2_u_zero");
}
void LiftoffAssembler::emit_i8x16_rounding_average_u(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_i8x16_rounding_average_u");
}
void LiftoffAssembler::emit_i16x8_rounding_average_u(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kUnsupportedArchitecture, "emit_i16x8_rounding_average_u");
}
void LiftoffAssembler::StackCheck(Label* ool_code, Register limit_address) {
LoadU64(limit_address, MemOperand(limit_address));
CmpU64(sp, limit_address);
......
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