Commit c9b1f165 authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ

ppc: rename LoadF32/F64/WithUpdate

Change-Id: I3a4e827f9407286c8665ee032fbbc4552ebd1d89
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2945272
Commit-Queue: Junliang Yan <junyan@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Auto-Submit: Junliang Yan <junyan@redhat.com>
Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75026}
parent c563e44a
......@@ -2804,8 +2804,8 @@ void TurboAssembler::StoreU8(Register src, const MemOperand& mem,
GenerateMemoryOperation(src, mem, stb, stbx);
}
void TurboAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
void TurboAssembler::LoadF64(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
......@@ -2817,8 +2817,8 @@ void TurboAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem,
}
}
void TurboAssembler::LoadFloat32(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
void TurboAssembler::LoadF32(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
......@@ -2830,8 +2830,9 @@ void TurboAssembler::LoadFloat32(DoubleRegister dst, const MemOperand& mem,
}
}
void MacroAssembler::LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
void MacroAssembler::LoadF64WithUpdate(DoubleRegister dst,
const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
......@@ -2843,21 +2844,9 @@ void MacroAssembler::LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
}
}
void TurboAssembler::LoadSingle(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
lfsx(dst, MemOperand(base, scratch));
} else {
lfs(dst, mem);
}
}
void TurboAssembler::LoadSingleU(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
void TurboAssembler::LoadF32WithUpdate(DoubleRegister dst,
const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
......@@ -3016,7 +3005,7 @@ void TurboAssembler::SwapFloat32(DoubleRegister src, MemOperand dst,
DoubleRegister scratch) {
DCHECK(!AreAliased(src, scratch));
fmr(scratch, src);
LoadSingle(src, dst, r0);
LoadF32(src, dst, r0);
StoreSingle(scratch, dst, r0);
}
......@@ -3024,8 +3013,8 @@ void TurboAssembler::SwapFloat32(MemOperand src, MemOperand dst,
DoubleRegister scratch_0,
DoubleRegister scratch_1) {
DCHECK(!AreAliased(scratch_0, scratch_1));
LoadSingle(scratch_0, src, r0);
LoadSingle(scratch_1, dst, r0);
LoadF32(scratch_0, src, r0);
LoadF32(scratch_1, dst, r0);
StoreSingle(scratch_0, dst, r0);
StoreSingle(scratch_1, src, r0);
}
......@@ -3043,7 +3032,7 @@ void TurboAssembler::SwapDouble(DoubleRegister src, MemOperand dst,
DoubleRegister scratch) {
DCHECK(!AreAliased(src, scratch));
fmr(scratch, src);
LoadDouble(src, dst, r0);
LoadF64(src, dst, r0);
StoreDouble(scratch, dst, r0);
}
......@@ -3051,8 +3040,8 @@ void TurboAssembler::SwapDouble(MemOperand src, MemOperand dst,
DoubleRegister scratch_0,
DoubleRegister scratch_1) {
DCHECK(!AreAliased(scratch_0, scratch_1));
LoadDouble(scratch_0, src, r0);
LoadDouble(scratch_1, dst, r0);
LoadF64(scratch_0, src, r0);
LoadF64(scratch_1, dst, r0);
StoreDouble(scratch_0, dst, r0);
StoreDouble(scratch_1, src, r0);
}
......
......@@ -138,10 +138,10 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
mov(kRootRegister, Operand(isolate_root));
}
void LoadDouble(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadFloat32(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadF64(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadF32(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadDoubleLiteral(DoubleRegister result, Double value, Register scratch);
void LoadSimd128(Simd128Register dst, const MemOperand& mem);
......@@ -150,10 +150,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// load an SMI value <value> to GPR <dst>
void LoadSmiLiteral(Register dst, Smi smi);
void LoadSingle(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadSingleU(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadF32WithUpdate(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadPC(Register dst);
void ComputeCodeStartAddress(Register dst);
......@@ -788,8 +786,8 @@ class V8_EXPORT_PRIVATE MacroAssembler : public TurboAssembler {
// load a literal double value <value> to FPR <result>
void LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadF64WithUpdate(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void Cmplwi(Register src1, const Operand& src2, Register scratch,
CRegister cr = cr7);
......
......@@ -1239,9 +1239,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
if (instr->OutputAt(0)->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(instr->OutputAt(0));
if (op->representation() == MachineRepresentation::kFloat64) {
__ LoadDouble(i.OutputDoubleRegister(), MemOperand(fp, offset), r0);
__ LoadF64(i.OutputDoubleRegister(), MemOperand(fp, offset), r0);
} else if (op->representation() == MachineRepresentation::kFloat32) {
__ LoadFloat32(i.OutputFloatRegister(), MemOperand(fp, offset), r0);
__ LoadF32(i.OutputFloatRegister(), MemOperand(fp, offset), r0);
} else {
DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
__ mov(ip, Operand(offset));
......@@ -4451,9 +4451,9 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
if (destination->IsFPRegister()) {
LocationOperand* op = LocationOperand::cast(source);
if (op->representation() == MachineRepresentation::kFloat64) {
__ LoadDouble(g.ToDoubleRegister(destination), src, r0);
__ LoadF64(g.ToDoubleRegister(destination), src, r0);
} else if (op->representation() == MachineRepresentation::kFloat32) {
__ LoadSingle(g.ToDoubleRegister(destination), src, r0);
__ LoadF32(g.ToDoubleRegister(destination), src, r0);
} else {
DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
MemOperand src = g.ToMemOperand(source);
......@@ -4465,10 +4465,10 @@ void CodeGenerator::AssembleMove(InstructionOperand* source,
LocationOperand* op = LocationOperand::cast(source);
DoubleRegister temp = kScratchDoubleReg;
if (op->representation() == MachineRepresentation::kFloat64) {
__ LoadDouble(temp, src, r0);
__ LoadF64(temp, src, r0);
__ StoreDouble(temp, g.ToMemOperand(destination), r0);
} else if (op->representation() == MachineRepresentation::kFloat32) {
__ LoadSingle(temp, src, r0);
__ LoadF32(temp, src, r0);
__ StoreSingle(temp, g.ToMemOperand(destination), r0);
} else {
DCHECK_EQ(MachineRepresentation::kSimd128, op->representation());
......
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