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Commit c762f127 authored by Clemens Hammacher's avatar Clemens Hammacher Committed by Commit Bot
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[disasm] Clean up decoding of immediates 

Instead of having hard to read reinterpret_casts all over the place,
extract this to separate methods.

R=mstarzinger@chromium.org

Bug: v8:9396
Change-Id: Id8d47b5dda8f5b32dedfe9f76c4f526ffcff0674
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1691024Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#62594}
parent 4d40e867
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Showing with 113 additions and 94 deletions
src/diagnostics/ia32/disasm-ia32.cc
View file @ c762f127
...@@ -184,6 +184,24 @@ void InstructionTable::AddJumpConditionalShort() { ...@@ -184,6 +184,24 @@ void InstructionTable::AddJumpConditionalShort() {
} }
} }
namespace {
int8_t Imm8(const uint8_t* data) {
return *reinterpret_cast<const int8_t*>(data);
}
uint8_t Imm8_U(const uint8_t* data) {
return *reinterpret_cast<const uint8_t*>(data);
}
int16_t Imm16(const uint8_t* data) {
return *reinterpret_cast<const int16_t*>(data);
}
uint16_t Imm16_U(const uint8_t* data) {
return *reinterpret_cast<const uint16_t*>(data);
}
int32_t Imm32(const uint8_t* data) {
return *reinterpret_cast<const int32_t*>(data);
}
} // namespace
// The IA32 disassembler implementation. // The IA32 disassembler implementation.
class DisassemblerIA32 { class DisassemblerIA32 {
public: public:
...@@ -373,8 +391,7 @@ int DisassemblerIA32::PrintRightOperandHelper( ...@@ -373,8 +391,7 @@ int DisassemblerIA32::PrintRightOperandHelper(
switch (mod) { switch (mod) {
case 0: case 0:
if (rm == ebp) { if (rm == ebp) {
int32_t disp = *reinterpret_cast<int32_t*>(modrmp + 1); AppendToBuffer("[0x%x]", Imm32(modrmp + 1));
AppendToBuffer("[0x%x]", disp);
return 5; return 5;
} else if (rm == esp) { } else if (rm == esp) {
byte sib = *(modrmp + 1); byte sib = *(modrmp + 1);
...@@ -384,7 +401,7 @@ int DisassemblerIA32::PrintRightOperandHelper( ...@@ -384,7 +401,7 @@ int DisassemblerIA32::PrintRightOperandHelper(
AppendToBuffer("[%s]", (this->*register_name)(rm)); AppendToBuffer("[%s]", (this->*register_name)(rm));
return 2; return 2;
} else if (base == ebp) { } else if (base == ebp) {
int32_t disp = *reinterpret_cast<int32_t*>(modrmp + 2); int32_t disp = Imm32(modrmp + 2);
AppendToBuffer("[%s*%d%s0x%x]", (this->*register_name)(index), AppendToBuffer("[%s*%d%s0x%x]", (this->*register_name)(index),
1 << scale, disp < 0 ? "-" : "+", 1 << scale, disp < 0 ? "-" : "+",
disp < 0 ? -disp : disp); disp < 0 ? -disp : disp);
...@@ -409,8 +426,7 @@ int DisassemblerIA32::PrintRightOperandHelper( ...@@ -409,8 +426,7 @@ int DisassemblerIA32::PrintRightOperandHelper(
byte sib = *(modrmp + 1); byte sib = *(modrmp + 1);
int scale, index, base; int scale, index, base;
get_sib(sib, &scale, &index, &base); get_sib(sib, &scale, &index, &base);
int disp = mod == 2 ? *reinterpret_cast<int32_t*>(modrmp + 2) int disp = mod == 2 ? Imm32(modrmp + 2) : Imm8(modrmp + 2);
: *reinterpret_cast<int8_t*>(modrmp + 2);
if (index == base && index == rm /*esp*/ && scale == 0 /*times_1*/) { if (index == base && index == rm /*esp*/ && scale == 0 /*times_1*/) {
AppendToBuffer("[%s%s0x%x]", (this->*register_name)(rm), AppendToBuffer("[%s%s0x%x]", (this->*register_name)(rm),
disp < 0 ? "-" : "+", disp < 0 ? -disp : disp); disp < 0 ? "-" : "+", disp < 0 ? -disp : disp);
...@@ -422,8 +438,7 @@ int DisassemblerIA32::PrintRightOperandHelper( ...@@ -422,8 +438,7 @@ int DisassemblerIA32::PrintRightOperandHelper(
return mod == 2 ? 6 : 3; return mod == 2 ? 6 : 3;
} else { } else {
// No sib. // No sib.
int disp = mod == 2 ? *reinterpret_cast<int32_t*>(modrmp + 1) int disp = mod == 2 ? Imm32(modrmp + 1) : Imm8(modrmp + 1);
: *reinterpret_cast<int8_t*>(modrmp + 1);
AppendToBuffer("[%s%s0x%x]", (this->*register_name)(rm), AppendToBuffer("[%s%s0x%x]", (this->*register_name)(rm),
disp < 0 ? "-" : "+", disp < 0 ? -disp : disp); disp < 0 ? "-" : "+", disp < 0 ? -disp : disp);
return mod == 2 ? 5 : 2; return mod == 2 ? 5 : 2;
...@@ -517,7 +532,7 @@ int DisassemblerIA32::PrintImmediateOp(byte* data) { ...@@ -517,7 +532,7 @@ int DisassemblerIA32::PrintImmediateOp(byte* data) {
AppendToBuffer(",0x%x", *(data + 1 + count)); AppendToBuffer(",0x%x", *(data + 1 + count));
return 1 + count + 1 /*int8*/; return 1 + count + 1 /*int8*/;
} else { } else {
AppendToBuffer(",0x%x", *reinterpret_cast<int32_t*>(data + 1 + count)); AppendToBuffer(",0x%x", Imm32(data + 1 + count));
return 1 + count + 4 /*int32_t*/; return 1 + count + 4 /*int32_t*/;
} }
} }
...@@ -557,7 +572,7 @@ int DisassemblerIA32::F7Instruction(byte* data) { ...@@ -557,7 +572,7 @@ int DisassemblerIA32::F7Instruction(byte* data) {
AppendToBuffer("%s ", mnem); AppendToBuffer("%s ", mnem);
int count = PrintRightOperand(data); int count = PrintRightOperand(data);
if (regop == 0) { if (regop == 0) {
AppendToBuffer(",0x%x", *reinterpret_cast<int32_t*>(data + count)); AppendToBuffer(",0x%x", Imm32(data + count));
count += 4; count += 4;
} }
return 1 + count; return 1 + count;
...@@ -627,7 +642,7 @@ int DisassemblerIA32::JumpShort(byte* data) { ...@@ -627,7 +642,7 @@ int DisassemblerIA32::JumpShort(byte* data) {
int DisassemblerIA32::JumpConditional(byte* data, const char* comment) { int DisassemblerIA32::JumpConditional(byte* data, const char* comment) {
DCHECK_EQ(0x0F, *data); DCHECK_EQ(0x0F, *data);
byte cond = *(data + 1) & 0x0F; byte cond = *(data + 1) & 0x0F;
byte* dest = data + *reinterpret_cast<int32_t*>(data + 2) + 6; byte* dest = data + Imm32(data + 2) + 6;
const char* mnem = jump_conditional_mnem[cond]; const char* mnem = jump_conditional_mnem[cond];
AppendToBuffer("%s %s", mnem, NameOfAddress(dest)); AppendToBuffer("%s %s", mnem, NameOfAddress(dest));
if (comment != nullptr) { if (comment != nullptr) {
...@@ -775,56 +790,53 @@ int DisassemblerIA32::AVXInstruction(byte* data) { ...@@ -775,56 +790,53 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
AppendToBuffer("vpblendw %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vpblendw %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<uint8_t*>(current)); AppendToBuffer(",%d", Imm8_U(current));
current++; current++;
break; break;
case 0x0F: case 0x0F:
AppendToBuffer("vpalignr %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vpalignr %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<uint8_t*>(current)); AppendToBuffer(",%d", Imm8_U(current));
current++; current++;
break; break;
case 0x14: case 0x14:
AppendToBuffer("vpextrb "); AppendToBuffer("vpextrb ");
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current));
*reinterpret_cast<int8_t*>(current));
current++; current++;
break; break;
case 0x15: case 0x15:
AppendToBuffer("vpextrw "); AppendToBuffer("vpextrw ");
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current));
*reinterpret_cast<int8_t*>(current));
current++; current++;
break; break;
case 0x16: case 0x16:
AppendToBuffer("vpextrd "); AppendToBuffer("vpextrd ");
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(current));
*reinterpret_cast<int8_t*>(current));
current++; current++;
break; break;
case 0x20: case 0x20:
AppendToBuffer("vpinsrb %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vpinsrb %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
case 0x21: case 0x21:
AppendToBuffer("vinsertps %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vinsertps %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
case 0x22: case 0x22:
AppendToBuffer("vpinsrd %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vpinsrd %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
default: default:
...@@ -872,7 +884,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) { ...@@ -872,7 +884,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
case 0x70: case 0x70:
AppendToBuffer("vpshuflw %s,", NameOfXMMRegister(regop)); AppendToBuffer("vpshuflw %s,", NameOfXMMRegister(regop));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
case 0x7C: case 0x7C:
...@@ -933,7 +945,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) { ...@@ -933,7 +945,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
case 0x70: case 0x70:
AppendToBuffer("vpshufhw %s,", NameOfXMMRegister(regop)); AppendToBuffer("vpshufhw %s,", NameOfXMMRegister(regop));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
case 0x7f: case 0x7f:
...@@ -1173,7 +1185,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) { ...@@ -1173,7 +1185,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
case 0x70: case 0x70:
AppendToBuffer("vpshufd %s,", NameOfXMMRegister(regop)); AppendToBuffer("vpshufd %s,", NameOfXMMRegister(regop));
current += PrintRightXMMOperand(current); current += PrintRightXMMOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
case 0x71: case 0x71:
...@@ -1197,7 +1209,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) { ...@@ -1197,7 +1209,7 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
AppendToBuffer("vpinsrw %s,%s,", NameOfXMMRegister(regop), AppendToBuffer("vpinsrw %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv)); NameOfXMMRegister(vvvv));
current += PrintRightOperand(current); current += PrintRightOperand(current);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(current)); AppendToBuffer(",%d", Imm8(current));
current++; current++;
break; break;
#define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \ #define DECLARE_SSE_AVX_DIS_CASE(instruction, notUsed1, notUsed2, opcode) \
...@@ -1615,8 +1627,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1615,8 +1627,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
break; break;
case MOVE_REG_INSTR: { case MOVE_REG_INSTR: {
byte* addr = byte* addr = reinterpret_cast<byte*>(Imm32(data + 1));
reinterpret_cast<byte*>(*reinterpret_cast<int32_t*>(data + 1));
AppendToBuffer("mov %s,%s", NameOfCPURegister(*data & 0x07), AppendToBuffer("mov %s,%s", NameOfCPURegister(*data & 0x07),
NameOfAddress(addr)); NameOfAddress(addr));
data += 5; data += 5;
...@@ -1624,15 +1635,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1624,15 +1635,14 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
} }
case CALL_JUMP_INSTR: { case CALL_JUMP_INSTR: {
byte* addr = data + *reinterpret_cast<int32_t*>(data + 1) + 5; byte* addr = data + Imm32(data + 1) + 5;
AppendToBuffer("%s %s", idesc.mnem, NameOfAddress(addr)); AppendToBuffer("%s %s", idesc.mnem, NameOfAddress(addr));
data += 5; data += 5;
break; break;
} }
case SHORT_IMMEDIATE_INSTR: { case SHORT_IMMEDIATE_INSTR: {
byte* addr = byte* addr = reinterpret_cast<byte*>(Imm32(data + 1));
reinterpret_cast<byte*>(*reinterpret_cast<int32_t*>(data + 1));
AppendToBuffer("%s eax,%s", idesc.mnem, NameOfAddress(addr)); AppendToBuffer("%s eax,%s", idesc.mnem, NameOfAddress(addr));
data += 5; data += 5;
break; break;
...@@ -1656,7 +1666,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1656,7 +1666,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
if (!processed) { if (!processed) {
switch (*data) { switch (*data) {
case 0xC2: case 0xC2:
AppendToBuffer("ret 0x%x", *reinterpret_cast<uint16_t*>(data + 1)); AppendToBuffer("ret 0x%x", Imm16_U(data + 1));
data += 3; data += 3;
break; break;
...@@ -1670,7 +1680,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1670,7 +1680,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
case 0x69: { case 0x69: {
data++; data++;
data += PrintOperands("imul", REG_OPER_OP_ORDER, data); data += PrintOperands("imul", REG_OPER_OP_ORDER, data);
AppendToBuffer(",%d", *reinterpret_cast<int32_t*>(data)); AppendToBuffer(",%d", Imm32(data));
data += 4; data += 4;
} break; } break;
...@@ -1920,8 +1930,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1920,8 +1930,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
} else { } else {
AppendToBuffer("%s ", "mov"); AppendToBuffer("%s ", "mov");
data += PrintRightOperand(data); data += PrintRightOperand(data);
int32_t imm = *reinterpret_cast<int32_t*>(data); AppendToBuffer(",0x%x", Imm32(data));
AppendToBuffer(",0x%x", imm);
data += 4; data += 4;
} }
} break; } break;
...@@ -1980,8 +1989,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -1980,8 +1989,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
data++; data++;
AppendToBuffer("cmpw "); AppendToBuffer("cmpw ");
data += PrintRightOperand(data); data += PrintRightOperand(data);
int imm = *reinterpret_cast<int16_t*>(data); AppendToBuffer(",0x%x", Imm16(data));
AppendToBuffer(",0x%x", imm);
data += 2; data += 2;
} else if (*data == 0x87) { } else if (*data == 0x87) {
data++; data++;
...@@ -2005,15 +2013,13 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2005,15 +2013,13 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
data++; data++;
AppendToBuffer("%s ", "mov_w"); AppendToBuffer("%s ", "mov_w");
data += PrintRightOperand(data); data += PrintRightOperand(data);
int imm = *reinterpret_cast<int16_t*>(data); AppendToBuffer(",0x%x", Imm16(data));
AppendToBuffer(",0x%x", imm);
data += 2; data += 2;
} else if (*data == 0xF7) { } else if (*data == 0xF7) {
data++; data++;
AppendToBuffer("%s ", "test_w"); AppendToBuffer("%s ", "test_w");
data += PrintRightOperand(data); data += PrintRightOperand(data);
int imm = *reinterpret_cast<int16_t*>(data); AppendToBuffer(",0x%x", Imm16(data));
AppendToBuffer(",0x%x", imm);
data += 2; data += 2;
} else if (*data == 0x0F) { } else if (*data == 0x0F) {
data++; data++;
...@@ -2062,7 +2068,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2062,7 +2068,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pblendw %s,", NameOfXMMRegister(regop)); AppendToBuffer("pblendw %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<uint8_t*>(data)); AppendToBuffer(",%d", Imm8_U(data));
data++; data++;
} else if (*data == 0x0F) { } else if (*data == 0x0F) {
data++; data++;
...@@ -2070,7 +2076,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2070,7 +2076,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("palignr %s,", NameOfXMMRegister(regop)); AppendToBuffer("palignr %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<uint8_t*>(data)); AppendToBuffer(",%d", Imm8_U(data));
data++; data++;
} else if (*data == 0x14) { } else if (*data == 0x14) {
data++; data++;
...@@ -2078,8 +2084,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2078,8 +2084,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pextrb "); AppendToBuffer("pextrb ");
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(data));
*reinterpret_cast<int8_t*>(data));
data++; data++;
} else if (*data == 0x15) { } else if (*data == 0x15) {
data++; data++;
...@@ -2087,8 +2092,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2087,8 +2092,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pextrw "); AppendToBuffer("pextrw ");
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(data));
*reinterpret_cast<int8_t*>(data));
data++; data++;
} else if (*data == 0x16) { } else if (*data == 0x16) {
data++; data++;
...@@ -2096,8 +2100,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2096,8 +2100,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pextrd "); AppendToBuffer("pextrd ");
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), AppendToBuffer(",%s,%d", NameOfXMMRegister(regop), Imm8(data));
*reinterpret_cast<int8_t*>(data));
data++; data++;
} else if (*data == 0x17) { } else if (*data == 0x17) {
data++; data++;
...@@ -2113,7 +2116,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2113,7 +2116,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pinsrb %s,", NameOfXMMRegister(regop)); AppendToBuffer("pinsrb %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else if (*data == 0x21) { } else if (*data == 0x21) {
data++; data++;
...@@ -2121,7 +2124,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2121,7 +2124,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("insertps %s,", NameOfXMMRegister(regop)); AppendToBuffer("insertps %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else if (*data == 0x22) { } else if (*data == 0x22) {
data++; data++;
...@@ -2129,7 +2132,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2129,7 +2132,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pinsrd %s,", NameOfXMMRegister(regop)); AppendToBuffer("pinsrd %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else { } else {
UnimplementedInstruction(); UnimplementedInstruction();
...@@ -2193,7 +2196,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2193,7 +2196,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pshufd %s,", NameOfXMMRegister(regop)); AppendToBuffer("pshufd %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else if (*data == 0x90) { } else if (*data == 0x90) {
data++; data++;
...@@ -2257,7 +2260,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2257,7 +2260,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pinsrw %s,", NameOfXMMRegister(regop)); AppendToBuffer("pinsrw %s,", NameOfXMMRegister(regop));
data += PrintRightOperand(data); data += PrintRightOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else if (*data == 0xE7) { } else if (*data == 0xE7) {
data++; data++;
...@@ -2309,22 +2312,22 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2309,22 +2312,22 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
} break; } break;
case 0x68: case 0x68:
AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data + 1)); AppendToBuffer("push 0x%x", Imm32(data + 1));
data += 5; data += 5;
break; break;
case 0x6A: case 0x6A:
AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); AppendToBuffer("push 0x%x", Imm8(data + 1));
data += 2; data += 2;
break; break;
case 0xA8: case 0xA8:
AppendToBuffer("test al,0x%x", *reinterpret_cast<uint8_t*>(data + 1)); AppendToBuffer("test al,0x%x", Imm8_U(data + 1));
data += 2; data += 2;
break; break;
case 0xA9: case 0xA9:
AppendToBuffer("test eax,0x%x", *reinterpret_cast<int32_t*>(data + 1)); AppendToBuffer("test eax,0x%x", Imm32(data + 1));
data += 5; data += 5;
break; break;
...@@ -2377,7 +2380,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2377,7 +2380,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pshuflw %s,", NameOfXMMRegister(regop)); AppendToBuffer("pshuflw %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else { } else {
const char* mnem = "?"; const char* mnem = "?";
...@@ -2477,7 +2480,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2477,7 +2480,7 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm); get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("pshufhw %s,", NameOfXMMRegister(regop)); AppendToBuffer("pshufhw %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data); data += PrintRightXMMOperand(data);
AppendToBuffer(",%d", *reinterpret_cast<int8_t*>(data)); AppendToBuffer(",%d", Imm8(data));
data++; data++;
} else if (b2 == 0x7F) { } else if (b2 == 0x7F) {
AppendToBuffer("movdqu "); AppendToBuffer("movdqu ");
......
src/diagnostics/x64/disasm-x64.cc
View file @ c762f127
...@@ -237,6 +237,30 @@ static const InstructionDesc cmov_instructions[16] = { ...@@ -237,6 +237,30 @@ static const InstructionDesc cmov_instructions[16] = {
{"cmovle", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false}, {"cmovle", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false},
{"cmovg", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false}}; {"cmovg", TWO_OPERANDS_INSTR, REG_OPER_OP_ORDER, false}};
namespace {
int8_t Imm8(const uint8_t* data) {
return *reinterpret_cast<const int8_t*>(data);
}
uint8_t Imm8_U(const uint8_t* data) {
return *reinterpret_cast<const uint8_t*>(data);
}
int16_t Imm16(const uint8_t* data) {
return *reinterpret_cast<const int16_t*>(data);
}
uint16_t Imm16_U(const uint8_t* data) {
return *reinterpret_cast<const uint16_t*>(data);
}
int32_t Imm32(const uint8_t* data) {
return *reinterpret_cast<const int32_t*>(data);
}
uint32_t Imm32_U(const uint8_t* data) {
return *reinterpret_cast<const uint32_t*>(data);
}
int64_t Imm64(const uint8_t* data) {
return *reinterpret_cast<const int64_t*>(data);
}
} // namespace
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
// DisassemblerX64 implementation. // DisassemblerX64 implementation.
...@@ -458,8 +482,7 @@ int DisassemblerX64::PrintRightOperandHelper( ...@@ -458,8 +482,7 @@ int DisassemblerX64::PrintRightOperandHelper(
switch (mod) { switch (mod) {
case 0: case 0:
if ((rm & 7) == 5) { if ((rm & 7) == 5) {
int32_t disp = *reinterpret_cast<int32_t*>(modrmp + 1); AppendToBuffer("[rip+0x%x]", Imm32(modrmp + 1));
AppendToBuffer("[rip+0x%x]", disp);
return 5; return 5;
} else if ((rm & 7) == 4) { } else if ((rm & 7) == 4) {
// Codes for SIB byte. // Codes for SIB byte.
...@@ -473,7 +496,7 @@ int DisassemblerX64::PrintRightOperandHelper( ...@@ -473,7 +496,7 @@ int DisassemblerX64::PrintRightOperandHelper(
return 2; return 2;
} else if (base == 5) { } else if (base == 5) {
// base == rbp means no base register (when mod == 0). // base == rbp means no base register (when mod == 0).
int32_t disp = *reinterpret_cast<int32_t*>(modrmp + 2); int32_t disp = Imm32(modrmp + 2);
AppendToBuffer("[%s*%d%s0x%x]", NameOfCPURegister(index), 1 << scale, AppendToBuffer("[%s*%d%s0x%x]", NameOfCPURegister(index), 1 << scale,
disp < 0 ? "-" : "+", disp < 0 ? -disp : disp); disp < 0 ? "-" : "+", disp < 0 ? -disp : disp);
return 6; return 6;
...@@ -497,8 +520,7 @@ int DisassemblerX64::PrintRightOperandHelper( ...@@ -497,8 +520,7 @@ int DisassemblerX64::PrintRightOperandHelper(
byte sib = *(modrmp + 1); byte sib = *(modrmp + 1);
int scale, index, base; int scale, index, base;
get_sib(sib, &scale, &index, &base); get_sib(sib, &scale, &index, &base);
int disp = (mod == 2) ? *reinterpret_cast<int32_t*>(modrmp + 2) int disp = (mod == 2) ? Imm32(modrmp + 2) : Imm8(modrmp + 2);
: *reinterpret_cast<int8_t*>(modrmp + 2);
if (index == 4 && (base & 7) == 4 && scale == 0 /*times_1*/) { if (index == 4 && (base & 7) == 4 && scale == 0 /*times_1*/) {
AppendToBuffer("[%s%s0x%x]", NameOfCPURegister(base), AppendToBuffer("[%s%s0x%x]", NameOfCPURegister(base),
disp < 0 ? "-" : "+", disp < 0 ? -disp : disp); disp < 0 ? "-" : "+", disp < 0 ? -disp : disp);
...@@ -510,8 +532,7 @@ int DisassemblerX64::PrintRightOperandHelper( ...@@ -510,8 +532,7 @@ int DisassemblerX64::PrintRightOperandHelper(
return mod == 2 ? 6 : 3; return mod == 2 ? 6 : 3;
} else { } else {
// No sib. // No sib.
int disp = (mod == 2) ? *reinterpret_cast<int32_t*>(modrmp + 1) int disp = (mod == 2) ? Imm32(modrmp + 1) : Imm8(modrmp + 1);
: *reinterpret_cast<int8_t*>(modrmp + 1);
AppendToBuffer("[%s%s0x%x]", NameOfCPURegister(rm), AppendToBuffer("[%s%s0x%x]", NameOfCPURegister(rm),
disp < 0 ? "-" : "+", disp < 0 ? -disp : disp); disp < 0 ? "-" : "+", disp < 0 ? -disp : disp);
if (rm == i::kRootRegister.code()) { if (rm == i::kRootRegister.code()) {
...@@ -540,15 +561,15 @@ int DisassemblerX64::PrintImmediate(byte* data, OperandSize size) { ...@@ -540,15 +561,15 @@ int DisassemblerX64::PrintImmediate(byte* data, OperandSize size) {
count = 1; count = 1;
break; break;
case OPERAND_WORD_SIZE: case OPERAND_WORD_SIZE:
value = *reinterpret_cast<int16_t*>(data); value = Imm16(data);
count = 2; count = 2;
break; break;
case OPERAND_DOUBLEWORD_SIZE: case OPERAND_DOUBLEWORD_SIZE:
value = *reinterpret_cast<uint32_t*>(data); value = Imm32_U(data);
count = 4; count = 4;
break; break;
case OPERAND_QUADWORD_SIZE: case OPERAND_QUADWORD_SIZE:
value = *reinterpret_cast<int32_t*>(data); value = Imm32(data);
count = 4; count = 4;
break; break;
default: default:
...@@ -763,7 +784,7 @@ int DisassemblerX64::JumpShort(byte* data) { ...@@ -763,7 +784,7 @@ int DisassemblerX64::JumpShort(byte* data) {
int DisassemblerX64::JumpConditional(byte* data) { int DisassemblerX64::JumpConditional(byte* data) {
DCHECK_EQ(0x0F, *data); DCHECK_EQ(0x0F, *data);
byte cond = *(data + 1) & 0x0F; byte cond = *(data + 1) & 0x0F;
byte* dest = data + *reinterpret_cast<int32_t*>(data + 2) + 6; byte* dest = data + Imm32(data + 2) + 6;
const char* mnem = conditional_code_suffix[cond]; const char* mnem = conditional_code_suffix[cond];
AppendToBuffer("j%s %s", mnem, NameOfAddress(dest)); AppendToBuffer("j%s %s", mnem, NameOfAddress(dest));
return 6; // includes 0x0F return 6; // includes 0x0F
...@@ -2421,18 +2442,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2421,18 +2442,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
byte* addr = nullptr; byte* addr = nullptr;
switch (operand_size()) { switch (operand_size()) {
case OPERAND_WORD_SIZE: case OPERAND_WORD_SIZE:
addr = addr = reinterpret_cast<byte*>(Imm16(data + 1));
reinterpret_cast<byte*>(*reinterpret_cast<int16_t*>(data + 1));
data += 3; data += 3;
break; break;
case OPERAND_DOUBLEWORD_SIZE: case OPERAND_DOUBLEWORD_SIZE:
addr = addr = reinterpret_cast<byte*>(Imm32_U(data + 1));
reinterpret_cast<byte*>(*reinterpret_cast<uint32_t*>(data + 1));
data += 5; data += 5;
break; break;
case OPERAND_QUADWORD_SIZE: case OPERAND_QUADWORD_SIZE:
addr = addr = reinterpret_cast<byte*>(Imm64(data + 1));
reinterpret_cast<byte*>(*reinterpret_cast<int64_t*>(data + 1));
data += 9; data += 9;
break; break;
default: default:
...@@ -2445,7 +2463,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2445,7 +2463,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
} }
case CALL_JUMP_INSTR: { case CALL_JUMP_INSTR: {
byte* addr = data + *reinterpret_cast<int32_t*>(data + 1) + 5; byte* addr = data + Imm32(data + 1) + 5;
AppendToBuffer("%s %s", idesc.mnem, NameOfAddress(addr)); AppendToBuffer("%s %s", idesc.mnem, NameOfAddress(addr));
data += 5; data += 5;
break; break;
...@@ -2454,10 +2472,10 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2454,10 +2472,10 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
case SHORT_IMMEDIATE_INSTR: { case SHORT_IMMEDIATE_INSTR: {
int32_t imm; int32_t imm;
if (operand_size() == OPERAND_WORD_SIZE) { if (operand_size() == OPERAND_WORD_SIZE) {
imm = *reinterpret_cast<int16_t*>(data + 1); imm = Imm16(data + 1);
data += 3; data += 3;
} else { } else {
imm = *reinterpret_cast<int32_t*>(data + 1); imm = Imm32(data + 1);
data += 5; data += 5;
} }
AppendToBuffer("%s rax,0x%x", idesc.mnem, imm); AppendToBuffer("%s rax,0x%x", idesc.mnem, imm);
...@@ -2478,7 +2496,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2478,7 +2496,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
if (!processed) { if (!processed) {
switch (*data) { switch (*data) {
case 0xC2: case 0xC2:
AppendToBuffer("ret 0x%x", *reinterpret_cast<uint16_t*>(data + 1)); AppendToBuffer("ret 0x%x", Imm16_U(data + 1));
data += 3; data += 3;
break; break;
...@@ -2562,12 +2580,10 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2562,12 +2580,10 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
AppendToBuffer("mov%c ", operand_size_code()); AppendToBuffer("mov%c ", operand_size_code());
data += PrintRightOperand(data); data += PrintRightOperand(data);
if (operand_size() == OPERAND_WORD_SIZE) { if (operand_size() == OPERAND_WORD_SIZE) {
int16_t imm = *reinterpret_cast<int16_t*>(data); AppendToBuffer(",0x%x", Imm16(data));
AppendToBuffer(",0x%x", imm);
data += 2; data += 2;
} else { } else {
int32_t imm = *reinterpret_cast<int32_t*>(data); AppendToBuffer(",0x%x", Imm32(data));
AppendToBuffer(",0x%x", imm);
data += 4; data += 4;
} }
} }
...@@ -2663,12 +2679,12 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2663,12 +2679,12 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
break; break;
} }
case 0x68: case 0x68:
AppendToBuffer("push 0x%x", *reinterpret_cast<int32_t*>(data + 1)); AppendToBuffer("push 0x%x", Imm32(data + 1));
data += 5; data += 5;
break; break;
case 0x6A: case 0x6A:
AppendToBuffer("push 0x%x", *reinterpret_cast<int8_t*>(data + 1)); AppendToBuffer("push 0x%x", Imm8(data + 1));
data += 2; data += 2;
break; break;
...@@ -2676,8 +2692,8 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2676,8 +2692,8 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
case 0xA3: case 0xA3:
switch (operand_size()) { switch (operand_size()) {
case OPERAND_DOUBLEWORD_SIZE: { case OPERAND_DOUBLEWORD_SIZE: {
const char* memory_location = NameOfAddress( const char* memory_location =
reinterpret_cast<byte*>(*reinterpret_cast<int32_t*>(data + 1))); NameOfAddress(reinterpret_cast<byte*>(Imm32(data + 1)));
if (*data == 0xA1) { // Opcode 0xA1 if (*data == 0xA1) { // Opcode 0xA1
AppendToBuffer("movzxlq rax,(%s)", memory_location); AppendToBuffer("movzxlq rax,(%s)", memory_location);
} else { // Opcode 0xA3 } else { // Opcode 0xA3
...@@ -2689,7 +2705,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2689,7 +2705,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
case OPERAND_QUADWORD_SIZE: { case OPERAND_QUADWORD_SIZE: {
// New x64 instruction mov rax,(imm_64). // New x64 instruction mov rax,(imm_64).
const char* memory_location = const char* memory_location =
NameOfAddress(*reinterpret_cast<byte**>(data + 1)); NameOfAddress(reinterpret_cast<byte*>(Imm64(data + 1)));
if (*data == 0xA1) { // Opcode 0xA1 if (*data == 0xA1) { // Opcode 0xA1
AppendToBuffer("movq rax,(%s)", memory_location); AppendToBuffer("movq rax,(%s)", memory_location);
} else { // Opcode 0xA3 } else { // Opcode 0xA3
...@@ -2705,7 +2721,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2705,7 +2721,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
break; break;
case 0xA8: case 0xA8:
AppendToBuffer("test al,0x%x", *reinterpret_cast<uint8_t*>(data + 1)); AppendToBuffer("test al,0x%x", Imm8_U(data + 1));
data += 2; data += 2;
break; break;
...@@ -2713,15 +2729,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2713,15 +2729,15 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
int64_t value = 0; int64_t value = 0;
switch (operand_size()) { switch (operand_size()) {
case OPERAND_WORD_SIZE: case OPERAND_WORD_SIZE:
value = *reinterpret_cast<uint16_t*>(data + 1); value = Imm16_U(data + 1);
data += 3; data += 3;
break; break;
case OPERAND_DOUBLEWORD_SIZE: case OPERAND_DOUBLEWORD_SIZE:
value = *reinterpret_cast<uint32_t*>(data + 1); value = Imm32_U(data + 1);
data += 5; data += 5;
break; break;
case OPERAND_QUADWORD_SIZE: case OPERAND_QUADWORD_SIZE:
value = *reinterpret_cast<int32_t*>(data + 1); value = Imm32(data + 1);
data += 5; data += 5;
break; break;
default: default:
...@@ -2764,7 +2780,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer, ...@@ -2764,7 +2780,7 @@ int DisassemblerX64::InstructionDecode(v8::internal::Vector<char> out_buffer,
break; break;
case 0x3C: case 0x3C:
AppendToBuffer("cmp al,0x%x", *reinterpret_cast<int8_t*>(data + 1)); AppendToBuffer("cmp al,0x%x", Imm8(data + 1));
data += 2; data += 2;
break; break;
......
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