Commit c4be24e3 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd][liftoff][arm][arm64] Implement all_true

Implement all_true for arm and arm64. Instruction sequence is the same
as TurboFan.

Bug: v8:9909
Change-Id: Ibe57c6ae6f700dfe5bd23a91a243778b6481c5a0
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2222606Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68089}
parent b972069f
......@@ -2564,7 +2564,13 @@ void LiftoffAssembler::emit_v32x4_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_alltrue");
UseScratchRegisterScope temps(this);
DwVfpRegister scratch = temps.AcquireD();
vpmin(NeonU32, scratch, src.low_fp(), src.high_fp());
vpmin(NeonU32, scratch, scratch, scratch);
ExtractLane(dst.gp(), scratch, NeonS32, 0);
cmp(dst.gp(), Operand(0));
mov(dst.gp(), Operand(1), LeaveCC, ne);
}
void LiftoffAssembler::emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs,
......@@ -2666,7 +2672,14 @@ void LiftoffAssembler::emit_v16x8_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_alltrue");
UseScratchRegisterScope temps(this);
DwVfpRegister scratch = temps.AcquireD();
vpmin(NeonU16, scratch, src.low_fp(), src.high_fp());
vpmin(NeonU16, scratch, scratch, scratch);
vpmin(NeonU16, scratch, scratch, scratch);
ExtractLane(dst.gp(), scratch, NeonS16, 0);
cmp(dst.gp(), Operand(0));
mov(dst.gp(), Operand(1), LeaveCC, ne);
}
void LiftoffAssembler::emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs,
......@@ -2840,7 +2853,15 @@ void LiftoffAssembler::emit_v8x16_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v8x16_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v8x16_alltrue");
UseScratchRegisterScope temps(this);
DwVfpRegister scratch = temps.AcquireD();
vpmin(NeonU8, scratch, src.low_fp(), src.high_fp());
vpmin(NeonU8, scratch, scratch, scratch);
vpmin(NeonU8, scratch, scratch, scratch);
vpmin(NeonU8, scratch, scratch, scratch);
ExtractLane(dst.gp(), scratch, NeonS8, 0);
cmp(dst.gp(), Operand(0));
mov(dst.gp(), Operand(1), LeaveCC, ne);
}
void LiftoffAssembler::emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs,
......
......@@ -164,6 +164,16 @@ inline void EmitAnyTrue(LiftoffAssembler* assm, LiftoffRegister dst,
assm->Cset(dst.gp().W(), ne);
}
inline void EmitAllTrue(LiftoffAssembler* assm, LiftoffRegister dst,
LiftoffRegister src, VectorFormat format) {
UseScratchRegisterScope scope(assm);
VRegister temp = scope.AcquireV(ScalarFormatFromFormat(format));
assm->Uminv(temp, VRegister::Create(src.fp().code(), format));
assm->Umov(dst.gp().W(), temp, 0);
assm->Cmp(dst.gp().W(), 0);
assm->Cset(dst.gp().W(), ne);
}
} // namespace liftoff
int LiftoffAssembler::PrepareStackFrame() {
......@@ -1500,7 +1510,7 @@ void LiftoffAssembler::emit_v32x4_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v32x4_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v32x4_alltrue");
liftoff::EmitAllTrue(this, dst, src, kFormat4S);
}
void LiftoffAssembler::emit_i32x4_shl(LiftoffRegister dst, LiftoffRegister lhs,
......@@ -1621,7 +1631,7 @@ void LiftoffAssembler::emit_v16x8_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v16x8_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v16x8_alltrue");
liftoff::EmitAllTrue(this, dst, src, kFormat8H);
}
void LiftoffAssembler::emit_i16x8_shl(LiftoffRegister dst, LiftoffRegister lhs,
......@@ -1766,7 +1776,7 @@ void LiftoffAssembler::emit_v8x16_anytrue(LiftoffRegister dst,
void LiftoffAssembler::emit_v8x16_alltrue(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "v8x16_alltrue");
liftoff::EmitAllTrue(this, dst, src, kFormat16B);
}
void LiftoffAssembler::emit_i8x16_shl(LiftoffRegister dst, LiftoffRegister lhs,
......
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