[arm64] A shift of 0 is not allowed in ubfx.

R=bmeurer@chromium.org, v8-arm-ports@googlegroups.com
BUG=v8:5951

Review-Url: https://codereview.chromium.org/2685943003
Cr-Commit-Position: refs/heads/master@{#43090}

src/compiler/arm64/instruction-selector-arm64.cc

@@ -957,6 +957,7 @@ void InstructionSelector::VisitWord64And(Node* node) {
         // Any shift value can match; int64 shifts use `value % 64`.
         uint32_t lsb = static_cast<uint32_t>(mleft.right().Value() & 0x3f);
 
+        if (lsb != 0) {
           // Ubfx cannot extract bits past the register size, however since
           // shifting the original value would have introduced some zeros we can
           // still use ubfx with a smaller mask and the remaining bits will be
@@ -969,6 +970,7 @@ void InstructionSelector::VisitWord64And(Node* node) {
                g.TempImmediate(static_cast<int32_t>(mask_width)));
           return;
         }
+      }
       // Other cases fall through to the normal And operation.
     }
   }

test/cctest/compiler/test-run-machops.cc

@@ -6730,6 +6730,14 @@ TEST(Regression5923) {
   }
 }
 
+TEST(Regression5951) {
+  BufferedRawMachineAssemblerTester<int64_t> m(MachineType::Int64());
+  m.Return(m.Word64And(m.Word64Shr(m.Parameter(0), m.Int64Constant(0)),
+                       m.Int64Constant(0xffffffffffffffffl)));
+  int64_t input = 1234;
+  CHECK_EQ(input, m.Call(input));
+}
+
 #endif  // V8_TARGET_ARCH_64_BIT
 
 }  // namespace compiler