Commit c46ccef9 authored by ahaas's avatar ahaas Committed by Commit bot

[arm64] A shift of 0 is not allowed in ubfx.

R=bmeurer@chromium.org, v8-arm-ports@googlegroups.com
BUG=v8:5951

Review-Url: https://codereview.chromium.org/2685943003
Cr-Commit-Position: refs/heads/master@{#43090}
parent 1fc93f2e
......@@ -957,17 +957,19 @@ void InstructionSelector::VisitWord64And(Node* node) {
// Any shift value can match; int64 shifts use `value % 64`.
uint32_t lsb = static_cast<uint32_t>(mleft.right().Value() & 0x3f);
// Ubfx cannot extract bits past the register size, however since
// shifting the original value would have introduced some zeros we can
// still use ubfx with a smaller mask and the remaining bits will be
// zeros.
if (lsb + mask_width > 64) mask_width = 64 - lsb;
Emit(kArm64Ubfx, g.DefineAsRegister(node),
g.UseRegister(mleft.left().node()),
g.UseImmediateOrTemp(mleft.right().node(), lsb),
g.TempImmediate(static_cast<int32_t>(mask_width)));
return;
if (lsb != 0) {
// Ubfx cannot extract bits past the register size, however since
// shifting the original value would have introduced some zeros we can
// still use ubfx with a smaller mask and the remaining bits will be
// zeros.
if (lsb + mask_width > 64) mask_width = 64 - lsb;
Emit(kArm64Ubfx, g.DefineAsRegister(node),
g.UseRegister(mleft.left().node()),
g.UseImmediateOrTemp(mleft.right().node(), lsb),
g.TempImmediate(static_cast<int32_t>(mask_width)));
return;
}
}
// Other cases fall through to the normal And operation.
}
......
......@@ -6730,6 +6730,14 @@ TEST(Regression5923) {
}
}
TEST(Regression5951) {
BufferedRawMachineAssemblerTester<int64_t> m(MachineType::Int64());
m.Return(m.Word64And(m.Word64Shr(m.Parameter(0), m.Int64Constant(0)),
m.Int64Constant(0xffffffffffffffffl)));
int64_t input = 1234;
CHECK_EQ(input, m.Call(input));
}
#endif // V8_TARGET_ARCH_64_BIT
} // namespace compiler
......
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