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Commit c07f0225 authored by mbrandy's avatar mbrandy Committed by Commit bot
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PPC64: [turbofan] Fix checked loads/stores. 

This refines e7d521fb -- as we still
require clean up of the uint index register.

TEST=mjsunit/asm/float32array-negative-offset
R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, bjaideep@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1919003004

Cr-Commit-Position: refs/heads/master@{#35778}
parent d565ba8f
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Showing with 11 additions and 4 deletions
src/compiler/ppc/code-generator-ppc.cc
View file @ c07f0225
......@@ -525,6 +525,12 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#if V8_TARGET_ARCH_PPC64
// TODO(mbrandy): fix paths that produce garbage in offset's upper 32-bits.
#define CleanUInt32(x) __ ClearLeftImm(x, x, Operand(32))
#else
#define CleanUInt32(x)
#endif
#define ASSEMBLE_CHECKED_LOAD_FLOAT(asm_instr, asm_instrx, width) \
do { \
......@@ -544,13 +550,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(result, operand); \
} else { \
CleanUInt32(offset); \
__ asm_instrx(result, operand); \
} \
__ bind(ool->exit()); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr, asm_instrx) \
do { \
Register result = i.OutputRegister(); \
......@@ -569,13 +575,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(result, operand); \
} else { \
CleanUInt32(offset); \
__ asm_instrx(result, operand); \
} \
__ bind(ool->exit()); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_FLOAT32() \
do { \
Label done; \
......@@ -595,13 +601,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ stfs(kScratchDoubleReg, operand); \
} else { \
CleanUInt32(offset); \
__ stfsx(kScratchDoubleReg, operand); \
} \
__ bind(&done); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_DOUBLE() \
do { \
Label done; \
......@@ -620,13 +626,13 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ stfd(value, operand); \
} else { \
CleanUInt32(offset); \
__ stfdx(value, operand); \
} \
__ bind(&done); \
DCHECK_EQ(LeaveRC, i.OutputRCBit()); \
} while (0)
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr, asm_instrx) \
do { \
Label done; \
......@@ -645,6 +651,7 @@ Condition FlagsConditionToCondition(FlagsCondition condition, ArchOpcode op) {
if (mode == kMode_MRI) { \
__ asm_instr(value, operand); \
} else { \
CleanUInt32(offset); \
__ asm_instrx(value, operand); \
} \
__ bind(&done); \
......
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