ppc: [liftoff] implement i32_add/i32_sub

Change-Id: Id843b276e59baeaf700f92e6bf71e20edcb0dd9d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3031581Reviewed-by: Milad Fa <mfarazma@redhat.com>
Commit-Queue: Milad Fa <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75754}

src/codegen/ppc/macro-assembler-ppc.cc

@@ -2705,6 +2705,30 @@ void TurboAssembler::SubS64(Register dst, Register src, const Operand& value,
   }
 }
 
+void TurboAssembler::AddS32(Register dst, Register src, Register value,
+                            RCBit r) {
+  AddS64(dst, src, value, LeaveOE, r);
+  extsw(dst, dst, r);
+}
+
+void TurboAssembler::AddS32(Register dst, Register src, const Operand& value,
+                            Register scratch, RCBit r) {
+  AddS64(dst, src, value, scratch, LeaveOE, r);
+  extsw(dst, dst, r);
+}
+
+void TurboAssembler::SubS32(Register dst, Register src, Register value,
+                            RCBit r) {
+  SubS64(dst, src, value, LeaveOE, r);
+  extsw(dst, dst, r);
+}
+
+void TurboAssembler::SubS32(Register dst, Register src, const Operand& value,
+                            Register scratch, RCBit r) {
+  SubS64(dst, src, value, scratch, LeaveOE, r);
+  extsw(dst, dst, r);
+}
+
 void TurboAssembler::CmpS64(Register src1, Register src2, CRegister cr) {
   cmp(src1, src2, cr);
 }

src/codegen/ppc/macro-assembler-ppc.h

@@ -191,6 +191,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
               Register scratch = r0, OEBit s = LeaveOE, RCBit r = LeaveRC);
   void SubS64(Register dst, Register src, Register value, OEBit s = LeaveOE,
               RCBit r = LeaveRC);
+  void AddS32(Register dst, Register src, const Operand& value,
+              Register scratch = r0, RCBit r = LeaveRC);
+  void AddS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
+  void SubS32(Register dst, Register src, const Operand& value,
+              Register scratch = r0, RCBit r = LeaveRC);
+  void SubS32(Register dst, Register src, Register value, RCBit r = LeaveRC);
 
   void Push(Register src) { push(src); }
   // Push a handle.

src/wasm/baseline/ppc/liftoff-assembler-ppc.h

@@ -783,8 +783,6 @@ void LiftoffAssembler::FillStackSlotsWithZero(int start, int size) {
     bailout(kUnsupportedArchitecture, "i64 shiftop: " #name);                  \
   }
 
-UNIMPLEMENTED_I32_BINOP_I(i32_add)
-UNIMPLEMENTED_I32_BINOP_I(i32_sub)
 UNIMPLEMENTED_I32_BINOP(i32_mul)
 UNIMPLEMENTED_I32_BINOP_I(i32_and)
 UNIMPLEMENTED_I32_BINOP_I(i32_or)
@@ -884,7 +882,11 @@ UNOP_LIST(EMIT_UNOP_FUNCTION)
   V(i64_add, AddS64, LiftoffRegister, LiftoffRegister, LiftoffRegister,      \
     LFR_TO_REG, LFR_TO_REG, LFR_TO_REG, USE, , void)                         \
   V(i64_addi, AddS64, LiftoffRegister, LiftoffRegister, int64_t, LFR_TO_REG, \
-    LFR_TO_REG, Operand, USE, , void)
+    LFR_TO_REG, Operand, USE, , void)                                        \
+  V(i32_sub, SubS32, Register, Register, Register, , , , USE, , void)        \
+  V(i32_add, AddS32, Register, Register, Register, , , , USE, , void)        \
+  V(i32_addi, AddS32, Register, Register, int32_t, , , Operand, USE, , void) \
+  V(i32_subi, SubS32, Register, Register, int32_t, , , Operand, USE, , void)
 
 #define EMIT_BINOP_FUNCTION(name, instr, dtype, stype1, stype2, dcast, scast1, \
                             scast2, rcast, ret, return_type)                   \