Commit bd16cc8a authored by Sigurd Schneider's avatar Sigurd Schneider Committed by Commit Bot

[ia32,root] Use root register config in tests

Change-Id: Iaa48cf1b7682aecfcb163e0b30538b9d8bd396db
Bug: v8:6666
Reviewed-on: https://chromium-review.googlesource.com/1256767Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
Commit-Queue: Sigurd Schneider <sigurds@chromium.org>
Cr-Commit-Position: refs/heads/master@{#56342}
parent 33d5cf9a
...@@ -37,6 +37,7 @@ ...@@ -37,6 +37,7 @@
#include "src/heap/factory.h" #include "src/heap/factory.h"
#include "src/isolate.h" #include "src/isolate.h"
#include "src/objects.h" #include "src/objects.h"
#include "src/register-configuration.h"
#include "src/utils.h" #include "src/utils.h"
#include "src/v8.h" #include "src/v8.h"
#include "src/zone/accounting-allocator.h" #include "src/zone/accounting-allocator.h"
...@@ -50,6 +51,13 @@ class RandomNumberGenerator; ...@@ -50,6 +51,13 @@ class RandomNumberGenerator;
namespace internal { namespace internal {
#if defined(V8_TARGET_ARCH_IA32) && defined(V8_EMBEDDED_BUILTINS)
// TODO(v8:6666): Fold into Default config once root is fully supported.
const auto GetRegConfig = RegisterConfiguration::PreserveRootIA32;
#else
const auto GetRegConfig = RegisterConfiguration::Default;
#endif
class HandleScope; class HandleScope;
class Zone; class Zone;
......
...@@ -361,7 +361,11 @@ class TestEnvironment : public HandleAndZoneScope { ...@@ -361,7 +361,11 @@ class TestEnvironment : public HandleAndZoneScope {
public: public:
// These constants may be tuned to experiment with different environments. // These constants may be tuned to experiment with different environments.
#if defined(V8_TARGET_ARCH_IA32) && defined(V8_EMBEDDED_BUILTINS)
static constexpr int kGeneralRegisterCount = 3;
#else
static constexpr int kGeneralRegisterCount = 4; static constexpr int kGeneralRegisterCount = 4;
#endif
static constexpr int kDoubleRegisterCount = 6; static constexpr int kDoubleRegisterCount = 6;
static constexpr int kTaggedSlotCount = 64; static constexpr int kTaggedSlotCount = 64;
...@@ -431,13 +435,10 @@ class TestEnvironment : public HandleAndZoneScope { ...@@ -431,13 +435,10 @@ class TestEnvironment : public HandleAndZoneScope {
// kReturnRegister0 as the first parameter, and the call will need a // kReturnRegister0 as the first parameter, and the call will need a
// register to hold the CodeObject address. So the maximum number of // register to hold the CodeObject address. So the maximum number of
// registers left to test with is the number of available registers minus 2. // registers left to test with is the number of available registers minus 2.
DCHECK_LE( DCHECK_LE(kGeneralRegisterCount,
kGeneralRegisterCount, GetRegConfig()->num_allocatable_general_registers() - 2);
RegisterConfiguration::Default()->num_allocatable_general_registers() -
2);
int32_t general_mask = int32_t general_mask = GetRegConfig()->allocatable_general_codes_mask();
RegisterConfiguration::Default()->allocatable_general_codes_mask();
// kReturnRegister0 is used to hold the "teardown" code object, do not // kReturnRegister0 is used to hold the "teardown" code object, do not
// generate moves using it. // generate moves using it.
std::unique_ptr<const RegisterConfiguration> registers( std::unique_ptr<const RegisterConfiguration> registers(
...@@ -1288,7 +1289,7 @@ TEST(FuzzAssembleMoveAndSwap) { ...@@ -1288,7 +1289,7 @@ TEST(FuzzAssembleMoveAndSwap) {
} }
TEST(AssembleTailCallGap) { TEST(AssembleTailCallGap) {
const RegisterConfiguration* conf = RegisterConfiguration::Default(); const RegisterConfiguration* conf = GetRegConfig();
TestEnvironment env; TestEnvironment env;
// This test assumes at least 4 registers are allocatable. // This test assumes at least 4 registers are allocatable.
......
...@@ -23,8 +23,6 @@ namespace internal { ...@@ -23,8 +23,6 @@ namespace internal {
namespace compiler { namespace compiler {
namespace test_run_native_calls { namespace test_run_native_calls {
const auto GetRegConfig = RegisterConfiguration::Default;
namespace { namespace {
typedef float float32; typedef float float32;
typedef double float64; typedef double float64;
......
...@@ -67,7 +67,7 @@ ConvertDToIFunc MakeConvertDToIFuncTrampoline(Isolate* isolate, ...@@ -67,7 +67,7 @@ ConvertDToIFunc MakeConvertDToIFuncTrampoline(Isolate* isolate,
// Save registers make sure they don't get clobbered. // Save registers make sure they don't get clobbered.
int reg_num = 0; int reg_num = 0;
for (; reg_num < Register::kNumRegisters; ++reg_num) { for (; reg_num < Register::kNumRegisters; ++reg_num) {
if (RegisterConfiguration::Default()->IsAllocatableGeneralCode(reg_num)) { if (GetRegConfig()->IsAllocatableGeneralCode(reg_num)) {
Register reg = Register::from_code(reg_num); Register reg = Register::from_code(reg_num);
if (reg != esp && reg != ebp && reg != destination_reg) { if (reg != esp && reg != ebp && reg != destination_reg) {
__ push(reg); __ push(reg);
...@@ -88,7 +88,7 @@ ConvertDToIFunc MakeConvertDToIFuncTrampoline(Isolate* isolate, ...@@ -88,7 +88,7 @@ ConvertDToIFunc MakeConvertDToIFuncTrampoline(Isolate* isolate,
// Make sure no registers have been unexpectedly clobbered // Make sure no registers have been unexpectedly clobbered
for (--reg_num; reg_num >= 0; --reg_num) { for (--reg_num; reg_num >= 0; --reg_num) {
if (RegisterConfiguration::Default()->IsAllocatableGeneralCode(reg_num)) { if (GetRegConfig()->IsAllocatableGeneralCode(reg_num)) {
Register reg = Register::from_code(reg_num); Register reg = Register::from_code(reg_num);
if (reg != esp && reg != ebp && reg != destination_reg) { if (reg != esp && reg != ebp && reg != destination_reg) {
__ cmp(reg, MemOperand(esp, 0)); __ cmp(reg, MemOperand(esp, 0));
......
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