Commit bcb78e6c authored by Clemens Backes's avatar Clemens Backes Committed by Commit Bot

[cleanup] Make Register::reg_code_ private

Subclasses can now access it via {code()}, even in constexpr contexts.

R=tebbi@chromium.org

Bug: v8:9810
Change-Id: I3cc6872f568f38db8cdbcda69ac0e203f839cda5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1914216Reviewed-by: 's avatarTobias Tebbi <tebbi@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64962}
parent 20f6f21c
......@@ -223,7 +223,7 @@ using DoubleRegister = DwVfpRegister;
class LowDwVfpRegister
: public RegisterBase<LowDwVfpRegister, kDoubleCode_d16> {
public:
constexpr operator DwVfpRegister() const { return DwVfpRegister(reg_code_); }
constexpr operator DwVfpRegister() const { return DwVfpRegister(code()); }
SwVfpRegister low() const { return SwVfpRegister::from_code(code() * 2); }
SwVfpRegister high() const {
......
......@@ -45,12 +45,12 @@ inline bool CPURegister::IsSameSizeAndType(const CPURegister& other) const {
inline bool CPURegister::IsZero() const {
DCHECK(is_valid());
return IsRegister() && (reg_code_ == kZeroRegCode);
return IsRegister() && (code() == kZeroRegCode);
}
inline bool CPURegister::IsSP() const {
DCHECK(is_valid());
return IsRegister() && (reg_code_ == kSPRegInternalCode);
return IsRegister() && (code() == kSPRegInternalCode);
}
inline void CPURegList::Combine(const CPURegList& other) {
......@@ -142,52 +142,52 @@ inline VRegister VRegister::VRegFromCode(unsigned code) {
inline Register CPURegister::W() const {
DCHECK(IsRegister());
return Register::WRegFromCode(reg_code_);
return Register::WRegFromCode(code());
}
inline Register CPURegister::Reg() const {
DCHECK(IsRegister());
return Register::Create(reg_code_, reg_size_);
return Register::Create(code(), reg_size_);
}
inline VRegister CPURegister::VReg() const {
DCHECK(IsVRegister());
return VRegister::Create(reg_code_, reg_size_);
return VRegister::Create(code(), reg_size_);
}
inline Register CPURegister::X() const {
DCHECK(IsRegister());
return Register::XRegFromCode(reg_code_);
return Register::XRegFromCode(code());
}
inline VRegister CPURegister::V() const {
DCHECK(IsVRegister());
return VRegister::VRegFromCode(reg_code_);
return VRegister::VRegFromCode(code());
}
inline VRegister CPURegister::B() const {
DCHECK(IsVRegister());
return VRegister::BRegFromCode(reg_code_);
return VRegister::BRegFromCode(code());
}
inline VRegister CPURegister::H() const {
DCHECK(IsVRegister());
return VRegister::HRegFromCode(reg_code_);
return VRegister::HRegFromCode(code());
}
inline VRegister CPURegister::S() const {
DCHECK(IsVRegister());
return VRegister::SRegFromCode(reg_code_);
return VRegister::SRegFromCode(code());
}
inline VRegister CPURegister::D() const {
DCHECK(IsVRegister());
return VRegister::DRegFromCode(reg_code_);
return VRegister::DRegFromCode(code());
}
inline VRegister CPURegister::Q() const {
DCHECK(IsVRegister());
return VRegister::QRegFromCode(reg_code_);
return VRegister::QRegFromCode(code());
}
// Immediate.
......
......@@ -3208,10 +3208,10 @@ void TurboAssembler::Printf(const char* format, CPURegister arg0,
// If any of the arguments are the current stack pointer, allocate a new
// register for them, and adjust the value to compensate for pushing the
// caller-saved registers.
bool arg0_sp = sp.Aliases(arg0);
bool arg1_sp = sp.Aliases(arg1);
bool arg2_sp = sp.Aliases(arg2);
bool arg3_sp = sp.Aliases(arg3);
bool arg0_sp = arg0.is_valid() && sp.Aliases(arg0);
bool arg1_sp = arg1.is_valid() && sp.Aliases(arg1);
bool arg2_sp = arg2.is_valid() && sp.Aliases(arg2);
bool arg3_sp = arg3.is_valid() && sp.Aliases(arg3);
if (arg0_sp || arg1_sp || arg2_sp || arg3_sp) {
// Allocate a register to hold the original stack pointer value, to pass
// to PrintfNoPreserve as an argument.
......
......@@ -151,7 +151,7 @@ class CPURegister : public RegisterBase<CPURegister, kRegAfterLast> {
}
bool IsNone() const { return reg_type_ == kNoRegister; }
constexpr bool Aliases(const CPURegister& other) const {
return (reg_code_ == other.reg_code_) && (reg_type_ == other.reg_type_);
return RegisterBase::operator==(other) && reg_type_ == other.reg_type_;
}
constexpr bool operator==(const CPURegister& other) const {
......
......@@ -59,7 +59,7 @@ enum RegisterCode {
class Register : public RegisterBase<Register, kRegAfterLast> {
public:
bool is_byte_register() const { return reg_code_ <= 3; }
bool is_byte_register() const { return code() <= 3; }
private:
friend class RegisterBase<Register, kRegAfterLast>;
......
......@@ -69,6 +69,8 @@ class RegisterBase {
protected:
explicit constexpr RegisterBase(int code) : reg_code_(code) {}
private:
int reg_code_;
};
......
......@@ -52,13 +52,13 @@ enum RegisterCode {
class Register : public RegisterBase<Register, kRegAfterLast> {
public:
bool is_byte_register() const { return reg_code_ <= 3; }
bool is_byte_register() const { return code() <= 3; }
// Return the high bit of the register code as a 0 or 1. Used often
// when constructing the REX prefix byte.
int high_bit() const { return reg_code_ >> 3; }
int high_bit() const { return code() >> 3; }
// Return the 3 low bits of the register code. Used when encoding registers
// in modR/M, SIB, and opcode bytes.
int low_bits() const { return reg_code_ & 0x7; }
int low_bits() const { return code() & 0x7; }
private:
friend class RegisterBase<Register, kRegAfterLast>;
......@@ -154,10 +154,10 @@ class XMMRegister : public RegisterBase<XMMRegister, kDoubleAfterLast> {
public:
// Return the high bit of the register code as a 0 or 1. Used often
// when constructing the REX prefix byte.
int high_bit() const { return reg_code_ >> 3; }
int high_bit() const { return code() >> 3; }
// Return the 3 low bits of the register code. Used when encoding registers
// in modR/M, SIB, and opcode bytes.
int low_bits() const { return reg_code_ & 0x7; }
int low_bits() const { return code() & 0x7; }
private:
friend class RegisterBase<XMMRegister, kDoubleAfterLast>;
......
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