[riscv] Fix shift error when the shift amount is less than or equal to -32

In wasm-spec, the shift amount will modulo 32 or 64.

Change-Id: I98d003dfd8b73d0d3eb1a022942d7b138d29fdc5
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3912629Reviewed-by: ji qiu <qiuji@iscas.ac.cn>
Commit-Queue: ji qiu <qiuji@iscas.ac.cn>
Auto-Submit: Yahan Lu <yahan@iscas.ac.cn>
Cr-Commit-Position: refs/heads/main@{#83414}

src/codegen/riscv/macro-assembler-riscv.cc

@@ -2420,6 +2420,7 @@ void TurboAssembler::ShlPair(Register dst_low, Register dst_high,
   DCHECK_GE(63, shift);
   DCHECK_NE(dst_low, src_low);
   DCHECK_NE(dst_high, src_low);
+  shift &= 0x3F;
   if (shift == 0) {
     Move(dst_high, src_high);
     Move(dst_low, src_low);
@@ -2489,7 +2490,7 @@ void TurboAssembler::ShrPair(Register dst_low, Register dst_high,
   DCHECK_GE(63, shift);
   DCHECK_NE(dst_low, src_high);
   DCHECK_NE(dst_high, src_high);
-
+  shift &= 0x3F;
   if (shift == 32) {
     mv(dst_low, src_high);
     li(dst_high, Operand(0));