Commit b81d3838 authored by Junliang Yan's avatar Junliang Yan Committed by V8 LUCI CQ

ppc: Add STHBRX to assembler/disasm/simulator

Change-Id: Ie092921e4a9c1e4a0acee827f73570f3f9617712
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2971557Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#75261}
parent b90cf282
......@@ -1244,6 +1244,8 @@ using Instr = uint32_t;
V(stdbrx, STDBRX, 0x7C000528) \
/* Store Word Byte-Reverse Indexed */ \
V(stwbrx, STWBRX, 0x7C00052C) \
/* Store Halfword Byte-Reverse Indexed */ \
V(sthbrx, STHBRX, 0x7C00072C) \
/* Load Vector Indexed */ \
V(lvx, LVX, 0x7C0000CE) \
/* Store Vector Indexed */ \
......@@ -1314,8 +1316,6 @@ using Instr = uint32_t;
V(nand, NAND, 0x7C0003B8) \
/* Parity Word */ \
V(prtyw, PRTYW, 0x7C000134) \
/* Store Halfword Byte-Reverse Indexed */ \
V(sthbrx, STHBRX, 0x7C00072C) \
/* Synchronize */ \
V(sync, SYNC, 0x7C0004AC) \
/* Trap Word */ \
......
......@@ -1117,6 +1117,10 @@ void Decoder::DecodeExt2(Instruction* instr) {
Format(instr, "stwbrx 'rs, 'ra, 'rb");
return;
}
case STHBRX: {
Format(instr, "sthbrx 'rs, 'ra, 'rb");
return;
}
case MTCRF: {
Format(instr, "mtcrf 'FXM, 'rs");
return;
......
......@@ -2981,6 +2981,16 @@ void Simulator::ExecuteGeneric(Instruction* instr) {
WriteW(ra_val + rb_val, __builtin_bswap32(rs_val));
break;
}
case STHBRX: {
int rs = instr->RSValue();
int ra = instr->RAValue();
int rb = instr->RBValue();
intptr_t ra_val = ra == 0 ? 0 : get_register(ra);
intptr_t rs_val = get_register(rs);
intptr_t rb_val = get_register(rb);
WriteH(ra_val + rb_val, __builtin_bswap16(rs_val));
break;
}
case STDX:
case STDUX: {
int rs = instr->RSValue();
......
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