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Commit b5d7e54e authored by Junliang Yan's avatar Junliang Yan Committed by Commit Bot
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s390x: remove unused instructions 

Change-Id: I083a15e0a25668e149f832477c9bef0963993696
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2587353Reviewed-by: 's avatarMilad Fa <mfarazma@redhat.com>
Commit-Queue: Junliang Yan <junyan@redhat.com>
Cr-Commit-Position: refs/heads/master@{#71725}
parent 3745599a
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src/codegen/s390/macro-assembler-s390.cc
View file @ b5d7e54e
......@@ -2720,18 +2720,6 @@ void TurboAssembler::Add32(Register dst, Register src) { ar(dst, src); }
// Add Pointer Size (Register dst = Register dst + Register src)
void TurboAssembler::AddP(Register dst, Register src) { agr(dst, src); }
// Add Pointer Size with src extension
// (Register dst(ptr) = Register dst (ptr) + Register src (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::AddP_ExtendSrc(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
agfr(dst, src);
#else
ar(dst, src);
#endif
}
// Add 32-bit (Register dst = Register src1 + Register src2)
void TurboAssembler::Add32(Register dst, Register src1, Register src2) {
if (dst != src1 && dst != src2) {
......@@ -2766,27 +2754,6 @@ void TurboAssembler::AddP(Register dst, Register src1, Register src2) {
agr(dst, src2);
}
// Add Pointer Size with src extension
// (Register dst (ptr) = Register dst (ptr) + Register src1 (ptr) +
// Register src2 (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::AddP_ExtendSrc(Register dst, Register src1,
Register src2) {
#if V8_TARGET_ARCH_S390X
if (dst == src2) {
// The source we need to sign extend is the same as result.
lgfr(dst, src2);
agr(dst, src1);
} else {
if (dst != src1) mov(dst, src1);
agfr(dst, src2);
}
#else
AddP(dst, src1, src2);
#endif
}
// Add 32-bit (Register-Memory)
void TurboAssembler::Add32(Register dst, const MemOperand& opnd) {
DCHECK(is_int20(opnd.offset()));
......@@ -2806,19 +2773,6 @@ void TurboAssembler::AddP(Register dst, const MemOperand& opnd) {
#endif
}
// Add Pointer Size with src extension
// (Register dst (ptr) = Register dst (ptr) + Mem opnd (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::AddP_ExtendSrc(Register dst, const MemOperand& opnd) {
#if V8_TARGET_ARCH_S390X
DCHECK(is_int20(opnd.offset()));
agf(dst, opnd);
#else
Add32(dst, opnd);
#endif
}
// Add 32-bit (Memory - Immediate)
void TurboAssembler::Add32(const MemOperand& opnd, const Operand& imm) {
DCHECK(is_int8(imm.immediate()));
......@@ -2939,18 +2893,6 @@ void TurboAssembler::Sub32(Register dst, Register src) { sr(dst, src); }
// Subtract Pointer Size (Register dst = Register dst - Register src)
void TurboAssembler::SubP(Register dst, Register src) { sgr(dst, src); }
// Subtract Pointer Size with src extension
// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::SubP_ExtendSrc(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
sgfr(dst, src);
#else
sr(dst, src);
#endif
}
// Subtract 32-bit (Register = Register - Register)
void TurboAssembler::Sub32(Register dst, Register src1, Register src2) {
// Use non-clobbering version if possible
......@@ -2991,28 +2933,6 @@ void TurboAssembler::SubP(Register dst, Register src1, Register src2) {
}
}
// Subtract Pointer Size with src extension
// (Register dst(ptr) = Register dst (ptr) - Register src (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::SubP_ExtendSrc(Register dst, Register src1,
Register src2) {
#if V8_TARGET_ARCH_S390X
if (dst != src1 && dst != src2) mov(dst, src1);
// In scenario where we have dst = src - dst, we need to swap and negate
if (dst != src1 && dst == src2) {
lgfr(dst, dst); // Sign extend this operand first.
lcgr(dst, dst); // dst = -dst
AddP(dst, src1); // dst = -dst + src
} else {
sgfr(dst, src2);
}
#else
SubP(dst, src1, src2);
#endif
}
// Subtract 32-bit (Register-Memory)
void TurboAssembler::Sub32(Register dst, const MemOperand& opnd) {
DCHECK(is_int20(opnd.offset()));
......@@ -3041,15 +2961,6 @@ void TurboAssembler::MovFloatToInt(Register dst, DoubleRegister src) {
srlg(dst, dst, Operand(32));
}
void TurboAssembler::SubP_ExtendSrc(Register dst, const MemOperand& opnd) {
#if V8_TARGET_ARCH_S390X
DCHECK(is_int20(opnd.offset()));
sgf(dst, opnd);
#else
Sub32(dst, opnd);
#endif
}
// Load And Subtract 32-bit (similar to laa/lan/lao/lax)
void TurboAssembler::LoadAndSub32(Register dst, Register src,
const MemOperand& opnd) {
......@@ -3086,20 +2997,6 @@ void TurboAssembler::SubLogicalP(Register dst, const MemOperand& opnd) {
#endif
}
// Subtract Logical Pointer Size with src extension
// (Register dst (ptr) = Register dst (ptr) - Mem opnd (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::SubLogicalP_ExtendSrc(Register dst,
const MemOperand& opnd) {
#if V8_TARGET_ARCH_S390X
DCHECK(is_int20(opnd.offset()));
slgf(dst, opnd);
#else
SubLogical(dst, opnd);
#endif
}
//----------------------------------------------------------------------------
// Bitwise Operations
//----------------------------------------------------------------------------
......@@ -3898,18 +3795,6 @@ void TurboAssembler::LoadAndTest32(Register dst, Register src) {
ltr(dst, src);
}
// Load And Test
// (Register dst(ptr) = Register src (32 | 32->64))
// src is treated as a 32-bit signed integer, which is sign extended to
// 64-bit if necessary.
void TurboAssembler::LoadAndTestP_ExtendSrc(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
ltgfr(dst, src);
#else
ltr(dst, src);
#endif
}
// Load And Test Pointer Sized (Reg <- Reg)
void TurboAssembler::LoadAndTestP(Register dst, Register src) {
#if V8_TARGET_ARCH_S390X
......
src/codegen/s390/macro-assembler-s390.h
View file @ b5d7e54e
......@@ -183,15 +183,12 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Add (Register - Register)
void Add32(Register dst, Register src);
void AddP(Register dst, Register src);
void AddP_ExtendSrc(Register dst, Register src);
void Add32(Register dst, Register src1, Register src2);
void AddP(Register dst, Register src1, Register src2);
void AddP_ExtendSrc(Register dst, Register src1, Register src2);
// Add (Register - Mem)
void Add32(Register dst, const MemOperand& opnd);
void AddP(Register dst, const MemOperand& opnd);
void AddP_ExtendSrc(Register dst, const MemOperand& opnd);
// Add (Mem - Immediate)
void Add32(const MemOperand& opnd, const Operand& imm);
......@@ -217,22 +214,18 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Subtract (Register - Register)
void Sub32(Register dst, Register src);
void SubP(Register dst, Register src);
void SubP_ExtendSrc(Register dst, Register src);
void Sub32(Register dst, Register src1, Register src2);
void SubP(Register dst, Register src1, Register src2);
void SubP_ExtendSrc(Register dst, Register src1, Register src2);
// Subtract (Register - Mem)
void Sub32(Register dst, const MemOperand& opnd);
void SubP(Register dst, const MemOperand& opnd);
void SubP_ExtendSrc(Register dst, const MemOperand& opnd);
void LoadAndSub32(Register dst, Register src, const MemOperand& opnd);
void LoadAndSub64(Register dst, Register src, const MemOperand& opnd);
// Subtract Logical (Register - Mem)
void SubLogical(Register dst, const MemOperand& opnd);
void SubLogicalP(Register dst, const MemOperand& opnd);
void SubLogicalP_ExtendSrc(Register dst, const MemOperand& opnd);
// Subtract Logical 32-bit
void SubLogical32(Register dst, Register src1, Register src2);
......@@ -323,7 +316,6 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// Load And Test
void LoadAndTest32(Register dst, Register src);
void LoadAndTestP_ExtendSrc(Register dst, Register src);
void LoadAndTestP(Register dst, Register src);
void LoadAndTest32(Register dst, const MemOperand& opnd);
......
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