Commit b5d6997a authored by Liu Yu's avatar Liu Yu Committed by V8 LUCI CQ

[loong64][mips][wasm-relaxed-simd] Add liftoff min/max operations on Arm and Arm64

Port commit 0236d7b5

Bug: v8:12284
Change-Id: I8ce66d3e4d61e8cc446364fbc1b1ba7d6036fca7
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3653715
Auto-Submit: Yu Liu <liuyu@loongson.cn>
Reviewed-by: 's avatarZhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Commit-Queue: Zhao Jiazhong <zhaojiazhong-hf@loongson.cn>
Cr-Commit-Position: refs/heads/main@{#80628}
parent 5354d8a1
...@@ -2543,6 +2543,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -2543,6 +2543,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_max"); bailout(kSimd, "emit_f32x4_max");
} }
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs, void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) { LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_pmin"); bailout(kSimd, "emit_f32x4_pmin");
...@@ -2632,6 +2644,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -2632,6 +2644,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_pmax"); bailout(kSimd, "emit_f64x2_pmax");
} }
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst, void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) { LiftoffRegister src) {
bailout(kSimd, "emit_f64x2_convert_low_i32x4_s"); bailout(kSimd, "emit_f64x2_convert_low_i32x4_s");
......
...@@ -2574,6 +2574,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -2574,6 +2574,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f32x4_max"); bailout(kSimd, "emit_f32x4_max");
} }
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs, void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) { LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_pmin"); bailout(kSimd, "emit_f32x4_pmin");
...@@ -2659,6 +2671,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -2659,6 +2671,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
bailout(kSimd, "emit_f64x2_pmax"); bailout(kSimd, "emit_f64x2_pmax");
} }
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst, void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) { LiftoffRegister src) {
bailout(kSimd, "emit_f64x2_convert_low_i32x4_s"); bailout(kSimd, "emit_f64x2_convert_low_i32x4_s");
......
...@@ -2982,6 +2982,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -2982,6 +2982,18 @@ void LiftoffAssembler::emit_f32x4_max(LiftoffRegister dst, LiftoffRegister lhs,
fmax_w(dst_msa, dst_msa, dst_msa); fmax_w(dst_msa, dst_msa, dst_msa);
} }
void LiftoffAssembler::emit_f32x4_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_min");
}
void LiftoffAssembler::emit_f32x4_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f32x4_relaxed_max");
}
void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs, void LiftoffAssembler::emit_f32x4_pmin(LiftoffRegister dst, LiftoffRegister lhs,
LiftoffRegister rhs) { LiftoffRegister rhs) {
MSARegister dst_msa = dst.fp().toW(); MSARegister dst_msa = dst.fp().toW();
...@@ -3125,6 +3137,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs, ...@@ -3125,6 +3137,18 @@ void LiftoffAssembler::emit_f64x2_pmax(LiftoffRegister dst, LiftoffRegister lhs,
bsel_v(dst_msa, lhs_msa, rhs_msa); bsel_v(dst_msa, lhs_msa, rhs_msa);
} }
void LiftoffAssembler::emit_f64x2_relaxed_min(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_min");
}
void LiftoffAssembler::emit_f64x2_relaxed_max(LiftoffRegister dst,
LiftoffRegister lhs,
LiftoffRegister rhs) {
bailout(kSimd, "emit_f64x2_relaxed_max");
}
void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst, void LiftoffAssembler::emit_f64x2_convert_low_i32x4_s(LiftoffRegister dst,
LiftoffRegister src) { LiftoffRegister src) {
xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero); xor_v(kSimd128RegZero, kSimd128RegZero, kSimd128RegZero);
......
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