Commit b4feaacc authored by mbrandy's avatar mbrandy Committed by Commit bot

PPC: Cleanup interface descriptors to reflect that vectors are part of loads.

Port 09aaf003

R=mvstanton@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1145223003

Cr-Commit-Position: refs/heads/master@{#28525}
parent 4a1ab1ca
...@@ -299,8 +299,8 @@ static const Register LoadIC_TempRegister() { return r6; } ...@@ -299,8 +299,8 @@ static const Register LoadIC_TempRegister() { return r6; }
static void LoadIC_PushArgs(MacroAssembler* masm) { static void LoadIC_PushArgs(MacroAssembler* masm) {
Register receiver = LoadDescriptor::ReceiverRegister(); Register receiver = LoadDescriptor::ReceiverRegister();
Register name = LoadDescriptor::NameRegister(); Register name = LoadDescriptor::NameRegister();
Register slot = VectorLoadICDescriptor::SlotRegister(); Register slot = LoadDescriptor::SlotRegister();
Register vector = VectorLoadICDescriptor::VectorRegister(); Register vector = LoadWithVectorDescriptor::VectorRegister();
__ Push(receiver, name, slot, vector); __ Push(receiver, name, slot, vector);
} }
...@@ -310,8 +310,8 @@ void LoadIC::GenerateMiss(MacroAssembler* masm) { ...@@ -310,8 +310,8 @@ void LoadIC::GenerateMiss(MacroAssembler* masm) {
// The return address is in lr. // The return address is in lr.
Isolate* isolate = masm->isolate(); Isolate* isolate = masm->isolate();
DCHECK(!AreAliased(r7, r8, VectorLoadICDescriptor::SlotRegister(), DCHECK(!AreAliased(r7, r8, LoadWithVectorDescriptor::SlotRegister(),
VectorLoadICDescriptor::VectorRegister())); LoadWithVectorDescriptor::VectorRegister()));
__ IncrementCounter(isolate->counters()->load_miss(), 1, r7, r8); __ IncrementCounter(isolate->counters()->load_miss(), 1, r7, r8);
LoadIC_PushArgs(masm); LoadIC_PushArgs(masm);
...@@ -448,8 +448,8 @@ void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) { ...@@ -448,8 +448,8 @@ void KeyedLoadIC::GenerateMiss(MacroAssembler* masm) {
// The return address is in lr. // The return address is in lr.
Isolate* isolate = masm->isolate(); Isolate* isolate = masm->isolate();
DCHECK(!AreAliased(r7, r8, VectorLoadICDescriptor::SlotRegister(), DCHECK(!AreAliased(r7, r8, LoadWithVectorDescriptor::SlotRegister(),
VectorLoadICDescriptor::VectorRegister())); LoadWithVectorDescriptor::VectorRegister()));
__ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, r7, r8); __ IncrementCounter(isolate->counters()->keyed_load_miss(), 1, r7, r8);
LoadIC_PushArgs(masm); LoadIC_PushArgs(masm);
...@@ -536,8 +536,8 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) { ...@@ -536,8 +536,8 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) {
// The handlers in the stub cache expect a vector and slot. Since we won't // The handlers in the stub cache expect a vector and slot. Since we won't
// change the IC from any downstream misses, a dummy vector can be used. // change the IC from any downstream misses, a dummy vector can be used.
Register vector = VectorLoadICDescriptor::VectorRegister(); Register vector = LoadWithVectorDescriptor::VectorRegister();
Register slot = VectorLoadICDescriptor::SlotRegister(); Register slot = LoadWithVectorDescriptor::SlotRegister();
DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10)); DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10));
Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast( Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
masm->isolate()->factory()->keyed_load_dummy_vector()); masm->isolate()->factory()->keyed_load_dummy_vector());
......
...@@ -142,8 +142,8 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind, ...@@ -142,8 +142,8 @@ void StubCache::GenerateProbe(MacroAssembler* masm, Code::Kind ic_kind,
// extra3 don't conflict with the vector and slot registers, which need // extra3 don't conflict with the vector and slot registers, which need
// to be preserved for a handler call or miss. // to be preserved for a handler call or miss.
if (IC::ICUseVector(ic_kind)) { if (IC::ICUseVector(ic_kind)) {
Register vector = VectorLoadICDescriptor::VectorRegister(); Register vector = LoadWithVectorDescriptor::VectorRegister();
Register slot = VectorLoadICDescriptor::SlotRegister(); Register slot = LoadWithVectorDescriptor::SlotRegister();
DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3)); DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3));
} }
#endif #endif
......
...@@ -1574,8 +1574,8 @@ void FunctionPrototypeStub::Generate(MacroAssembler* masm) { ...@@ -1574,8 +1574,8 @@ void FunctionPrototypeStub::Generate(MacroAssembler* masm) {
Register receiver = LoadDescriptor::ReceiverRegister(); Register receiver = LoadDescriptor::ReceiverRegister();
// Ensure that the vector and slot registers won't be clobbered before // Ensure that the vector and slot registers won't be clobbered before
// calling the miss handler. // calling the miss handler.
DCHECK(!AreAliased(r7, r8, VectorLoadICDescriptor::VectorRegister(), DCHECK(!AreAliased(r7, r8, LoadWithVectorDescriptor::VectorRegister(),
VectorLoadICDescriptor::SlotRegister())); LoadWithVectorDescriptor::SlotRegister()));
NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, r7, NamedLoadHandlerCompiler::GenerateLoadFunctionPrototype(masm, receiver, r7,
r8, &miss); r8, &miss);
...@@ -1594,8 +1594,8 @@ void LoadIndexedStringStub::Generate(MacroAssembler* masm) { ...@@ -1594,8 +1594,8 @@ void LoadIndexedStringStub::Generate(MacroAssembler* masm) {
Register scratch = r8; Register scratch = r8;
Register result = r3; Register result = r3;
DCHECK(!scratch.is(receiver) && !scratch.is(index)); DCHECK(!scratch.is(receiver) && !scratch.is(index));
DCHECK(!scratch.is(VectorLoadICDescriptor::VectorRegister()) && DCHECK(!scratch.is(LoadWithVectorDescriptor::VectorRegister()) &&
result.is(VectorLoadICDescriptor::SlotRegister())); result.is(LoadWithVectorDescriptor::SlotRegister()));
// StringCharAtGenerator doesn't use the result register until it's passed // StringCharAtGenerator doesn't use the result register until it's passed
// the different miss possibilities. If it did, we would have a conflict // the different miss possibilities. If it did, we would have a conflict
...@@ -3124,8 +3124,8 @@ void StringCharCodeAtGenerator::GenerateSlow( ...@@ -3124,8 +3124,8 @@ void StringCharCodeAtGenerator::GenerateSlow(
DONT_DO_SMI_CHECK); DONT_DO_SMI_CHECK);
call_helper.BeforeCall(masm); call_helper.BeforeCall(masm);
if (embed_mode == PART_OF_IC_HANDLER) { if (embed_mode == PART_OF_IC_HANDLER) {
__ Push(VectorLoadICDescriptor::VectorRegister(), __ Push(LoadWithVectorDescriptor::VectorRegister(),
VectorLoadICDescriptor::SlotRegister(), object_, index_); LoadWithVectorDescriptor::SlotRegister(), object_, index_);
} else { } else {
// index_ is consumed by runtime conversion function. // index_ is consumed by runtime conversion function.
__ Push(object_, index_); __ Push(object_, index_);
...@@ -3141,8 +3141,8 @@ void StringCharCodeAtGenerator::GenerateSlow( ...@@ -3141,8 +3141,8 @@ void StringCharCodeAtGenerator::GenerateSlow(
// have a chance to overwrite it. // have a chance to overwrite it.
__ Move(index_, r3); __ Move(index_, r3);
if (embed_mode == PART_OF_IC_HANDLER) { if (embed_mode == PART_OF_IC_HANDLER) {
__ Pop(VectorLoadICDescriptor::VectorRegister(), __ Pop(LoadWithVectorDescriptor::VectorRegister(),
VectorLoadICDescriptor::SlotRegister(), object_); LoadWithVectorDescriptor::SlotRegister(), object_);
} else { } else {
__ pop(object_); __ pop(object_);
} }
...@@ -4594,15 +4594,15 @@ void StubFailureTrampolineStub::Generate(MacroAssembler* masm) { ...@@ -4594,15 +4594,15 @@ void StubFailureTrampolineStub::Generate(MacroAssembler* masm) {
void LoadICTrampolineStub::Generate(MacroAssembler* masm) { void LoadICTrampolineStub::Generate(MacroAssembler* masm) {
EmitLoadTypeFeedbackVector(masm, VectorLoadICDescriptor::VectorRegister()); EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
VectorRawLoadStub stub(isolate(), state()); LoadICStub stub(isolate(), state());
stub.GenerateForTrampoline(masm); stub.GenerateForTrampoline(masm);
} }
void KeyedLoadICTrampolineStub::Generate(MacroAssembler* masm) { void KeyedLoadICTrampolineStub::Generate(MacroAssembler* masm) {
EmitLoadTypeFeedbackVector(masm, VectorLoadICDescriptor::VectorRegister()); EmitLoadTypeFeedbackVector(masm, LoadWithVectorDescriptor::VectorRegister());
VectorRawKeyedLoadStub stub(isolate()); KeyedLoadICStub stub(isolate());
stub.GenerateForTrampoline(masm); stub.GenerateForTrampoline(masm);
} }
...@@ -4621,12 +4621,10 @@ void CallIC_ArrayTrampolineStub::Generate(MacroAssembler* masm) { ...@@ -4621,12 +4621,10 @@ void CallIC_ArrayTrampolineStub::Generate(MacroAssembler* masm) {
} }
void VectorRawLoadStub::Generate(MacroAssembler* masm) { void LoadICStub::Generate(MacroAssembler* masm) { GenerateImpl(masm, false); }
GenerateImpl(masm, false);
}
void VectorRawLoadStub::GenerateForTrampoline(MacroAssembler* masm) { void LoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
GenerateImpl(masm, true); GenerateImpl(masm, true);
} }
...@@ -4726,11 +4724,11 @@ static void HandleMonomorphicCase(MacroAssembler* masm, Register receiver, ...@@ -4726,11 +4724,11 @@ static void HandleMonomorphicCase(MacroAssembler* masm, Register receiver,
} }
void VectorRawLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) { void LoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
Register receiver = VectorLoadICDescriptor::ReceiverRegister(); // r4 Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // r4
Register name = VectorLoadICDescriptor::NameRegister(); // r5 Register name = LoadWithVectorDescriptor::NameRegister(); // r5
Register vector = VectorLoadICDescriptor::VectorRegister(); // r6 Register vector = LoadWithVectorDescriptor::VectorRegister(); // r6
Register slot = VectorLoadICDescriptor::SlotRegister(); // r3 Register slot = LoadWithVectorDescriptor::SlotRegister(); // r3
Register feedback = r7; Register feedback = r7;
Register receiver_map = r8; Register receiver_map = r8;
Register scratch1 = r9; Register scratch1 = r9;
...@@ -4773,21 +4771,21 @@ void VectorRawLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) { ...@@ -4773,21 +4771,21 @@ void VectorRawLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
} }
void VectorRawKeyedLoadStub::Generate(MacroAssembler* masm) { void KeyedLoadICStub::Generate(MacroAssembler* masm) {
GenerateImpl(masm, false); GenerateImpl(masm, false);
} }
void VectorRawKeyedLoadStub::GenerateForTrampoline(MacroAssembler* masm) { void KeyedLoadICStub::GenerateForTrampoline(MacroAssembler* masm) {
GenerateImpl(masm, true); GenerateImpl(masm, true);
} }
void VectorRawKeyedLoadStub::GenerateImpl(MacroAssembler* masm, bool in_frame) { void KeyedLoadICStub::GenerateImpl(MacroAssembler* masm, bool in_frame) {
Register receiver = VectorLoadICDescriptor::ReceiverRegister(); // r4 Register receiver = LoadWithVectorDescriptor::ReceiverRegister(); // r4
Register key = VectorLoadICDescriptor::NameRegister(); // r5 Register key = LoadWithVectorDescriptor::NameRegister(); // r5
Register vector = VectorLoadICDescriptor::VectorRegister(); // r6 Register vector = LoadWithVectorDescriptor::VectorRegister(); // r6
Register slot = VectorLoadICDescriptor::SlotRegister(); // r3 Register slot = LoadWithVectorDescriptor::SlotRegister(); // r3
Register feedback = r7; Register feedback = r7;
Register receiver_map = r8; Register receiver_map = r8;
Register scratch1 = r9; Register scratch1 = r9;
......
...@@ -161,8 +161,8 @@ void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) { ...@@ -161,8 +161,8 @@ void DebugCodegen::GenerateLoadICDebugBreak(MacroAssembler* masm) {
// Calling convention for IC load (from ic-ppc.cc). // Calling convention for IC load (from ic-ppc.cc).
Register receiver = LoadDescriptor::ReceiverRegister(); Register receiver = LoadDescriptor::ReceiverRegister();
Register name = LoadDescriptor::NameRegister(); Register name = LoadDescriptor::NameRegister();
RegList regs = receiver.bit() | name.bit() | Register slot = LoadDescriptor::SlotRegister();
VectorLoadICTrampolineDescriptor::SlotRegister().bit(); RegList regs = receiver.bit() | name.bit() | slot.bit();
Generate_DebugBreakCallHelper(masm, regs, 0); Generate_DebugBreakCallHelper(masm, regs, 0);
} }
......
...@@ -1294,7 +1294,7 @@ void FullCodeGenerator::EmitLoadHomeObject(SuperReference* expr) { ...@@ -1294,7 +1294,7 @@ void FullCodeGenerator::EmitLoadHomeObject(SuperReference* expr) {
Handle<Symbol> home_object_symbol(isolate()->heap()->home_object_symbol()); Handle<Symbol> home_object_symbol(isolate()->heap()->home_object_symbol());
__ Move(LoadDescriptor::NameRegister(), home_object_symbol); __ Move(LoadDescriptor::NameRegister(), home_object_symbol);
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(expr->HomeObjectFeedbackSlot()))); Operand(SmiFromSlot(expr->HomeObjectFeedbackSlot())));
CallLoadIC(NOT_CONTEXTUAL); CallLoadIC(NOT_CONTEXTUAL);
...@@ -1369,7 +1369,7 @@ void FullCodeGenerator::EmitLoadGlobalCheckExtensions(VariableProxy* proxy, ...@@ -1369,7 +1369,7 @@ void FullCodeGenerator::EmitLoadGlobalCheckExtensions(VariableProxy* proxy,
__ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand()); __ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand());
__ mov(LoadDescriptor::NameRegister(), Operand(proxy->var()->name())); __ mov(LoadDescriptor::NameRegister(), Operand(proxy->var()->name()));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(proxy->VariableFeedbackSlot()))); Operand(SmiFromSlot(proxy->VariableFeedbackSlot())));
ContextualMode mode = ContextualMode mode =
...@@ -1455,7 +1455,7 @@ void FullCodeGenerator::EmitVariableLoad(VariableProxy* proxy) { ...@@ -1455,7 +1455,7 @@ void FullCodeGenerator::EmitVariableLoad(VariableProxy* proxy) {
Comment cmnt(masm_, "[ Global variable"); Comment cmnt(masm_, "[ Global variable");
__ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand()); __ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand());
__ mov(LoadDescriptor::NameRegister(), Operand(var->name())); __ mov(LoadDescriptor::NameRegister(), Operand(var->name()));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(proxy->VariableFeedbackSlot()))); Operand(SmiFromSlot(proxy->VariableFeedbackSlot())));
CallGlobalLoadIC(var->name()); CallGlobalLoadIC(var->name());
context()->Plug(r3); context()->Plug(r3);
...@@ -2148,7 +2148,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) { ...@@ -2148,7 +2148,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) {
__ bind(&l_call); __ bind(&l_call);
__ LoadP(load_receiver, MemOperand(sp, kPointerSize)); __ LoadP(load_receiver, MemOperand(sp, kPointerSize));
__ LoadP(load_name, MemOperand(sp, 2 * kPointerSize)); __ LoadP(load_name, MemOperand(sp, 2 * kPointerSize));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(expr->KeyedLoadFeedbackSlot()))); Operand(SmiFromSlot(expr->KeyedLoadFeedbackSlot())));
Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate()).code(); Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate()).code();
CallIC(ic, TypeFeedbackId::None()); CallIC(ic, TypeFeedbackId::None());
...@@ -2165,7 +2165,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) { ...@@ -2165,7 +2165,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) {
__ push(load_receiver); // save result __ push(load_receiver); // save result
__ LoadRoot(load_name, Heap::kdone_stringRootIndex); // "done" __ LoadRoot(load_name, Heap::kdone_stringRootIndex); // "done"
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(expr->DoneFeedbackSlot()))); Operand(SmiFromSlot(expr->DoneFeedbackSlot())));
CallLoadIC(NOT_CONTEXTUAL); // r0=result.done CallLoadIC(NOT_CONTEXTUAL); // r0=result.done
Handle<Code> bool_ic = ToBooleanStub::GetUninitialized(isolate()); Handle<Code> bool_ic = ToBooleanStub::GetUninitialized(isolate());
...@@ -2176,7 +2176,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) { ...@@ -2176,7 +2176,7 @@ void FullCodeGenerator::VisitYield(Yield* expr) {
// result.value // result.value
__ pop(load_receiver); // result __ pop(load_receiver); // result
__ LoadRoot(load_name, Heap::kvalue_stringRootIndex); // "value" __ LoadRoot(load_name, Heap::kvalue_stringRootIndex); // "value"
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(expr->ValueFeedbackSlot()))); Operand(SmiFromSlot(expr->ValueFeedbackSlot())));
CallLoadIC(NOT_CONTEXTUAL); // r3=result.value CallLoadIC(NOT_CONTEXTUAL); // r3=result.value
context()->DropAndPlug(2, r3); // drop iter and g context()->DropAndPlug(2, r3); // drop iter and g
...@@ -2333,7 +2333,7 @@ void FullCodeGenerator::EmitNamedPropertyLoad(Property* prop) { ...@@ -2333,7 +2333,7 @@ void FullCodeGenerator::EmitNamedPropertyLoad(Property* prop) {
DCHECK(!prop->IsSuperAccess()); DCHECK(!prop->IsSuperAccess());
__ mov(LoadDescriptor::NameRegister(), Operand(key->value())); __ mov(LoadDescriptor::NameRegister(), Operand(key->value()));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(prop->PropertyFeedbackSlot()))); Operand(SmiFromSlot(prop->PropertyFeedbackSlot())));
CallLoadIC(NOT_CONTEXTUAL); CallLoadIC(NOT_CONTEXTUAL);
} }
...@@ -2354,7 +2354,7 @@ void FullCodeGenerator::EmitNamedSuperPropertyLoad(Property* prop) { ...@@ -2354,7 +2354,7 @@ void FullCodeGenerator::EmitNamedSuperPropertyLoad(Property* prop) {
void FullCodeGenerator::EmitKeyedPropertyLoad(Property* prop) { void FullCodeGenerator::EmitKeyedPropertyLoad(Property* prop) {
SetSourcePosition(prop->position()); SetSourcePosition(prop->position());
Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate()).code(); Handle<Code> ic = CodeFactory::KeyedLoadIC(isolate()).code();
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(prop->PropertyFeedbackSlot()))); Operand(SmiFromSlot(prop->PropertyFeedbackSlot())));
CallIC(ic); CallIC(ic);
} }
...@@ -4626,7 +4626,7 @@ void FullCodeGenerator::EmitLoadJSRuntimeFunction(CallRuntime* expr) { ...@@ -4626,7 +4626,7 @@ void FullCodeGenerator::EmitLoadJSRuntimeFunction(CallRuntime* expr) {
// Load the function from the receiver. // Load the function from the receiver.
__ mov(LoadDescriptor::NameRegister(), Operand(expr->name())); __ mov(LoadDescriptor::NameRegister(), Operand(expr->name()));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(expr->CallRuntimeFeedbackSlot()))); Operand(SmiFromSlot(expr->CallRuntimeFeedbackSlot())));
CallLoadIC(NOT_CONTEXTUAL); CallLoadIC(NOT_CONTEXTUAL);
} }
...@@ -5057,7 +5057,7 @@ void FullCodeGenerator::VisitForTypeofValue(Expression* expr) { ...@@ -5057,7 +5057,7 @@ void FullCodeGenerator::VisitForTypeofValue(Expression* expr) {
Comment cmnt(masm_, "[ Global variable"); Comment cmnt(masm_, "[ Global variable");
__ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand()); __ LoadP(LoadDescriptor::ReceiverRegister(), GlobalObjectOperand());
__ mov(LoadDescriptor::NameRegister(), Operand(proxy->name())); __ mov(LoadDescriptor::NameRegister(), Operand(proxy->name()));
__ mov(VectorLoadICDescriptor::SlotRegister(), __ mov(LoadDescriptor::SlotRegister(),
Operand(SmiFromSlot(proxy->VariableFeedbackSlot()))); Operand(SmiFromSlot(proxy->VariableFeedbackSlot())));
// Use a regular load, not a contextual load, to avoid a reference // Use a regular load, not a contextual load, to avoid a reference
// error. // error.
......
...@@ -16,12 +16,10 @@ const Register CallInterfaceDescriptor::ContextRegister() { return cp; } ...@@ -16,12 +16,10 @@ const Register CallInterfaceDescriptor::ContextRegister() { return cp; }
const Register LoadDescriptor::ReceiverRegister() { return r4; } const Register LoadDescriptor::ReceiverRegister() { return r4; }
const Register LoadDescriptor::NameRegister() { return r5; } const Register LoadDescriptor::NameRegister() { return r5; }
const Register LoadDescriptor::SlotRegister() { return r3; }
const Register VectorLoadICTrampolineDescriptor::SlotRegister() { return r3; } const Register LoadWithVectorDescriptor::VectorRegister() { return r6; }
const Register VectorLoadICDescriptor::VectorRegister() { return r6; }
const Register StoreDescriptor::ReceiverRegister() { return r4; } const Register StoreDescriptor::ReceiverRegister() { return r4; }
......
...@@ -3049,8 +3049,8 @@ void LCodeGen::DoReturn(LReturn* instr) { ...@@ -3049,8 +3049,8 @@ void LCodeGen::DoReturn(LReturn* instr) {
template <class T> template <class T>
void LCodeGen::EmitVectorLoadICRegisters(T* instr) { void LCodeGen::EmitVectorLoadICRegisters(T* instr) {
Register vector_register = ToRegister(instr->temp_vector()); Register vector_register = ToRegister(instr->temp_vector());
Register slot_register = VectorLoadICDescriptor::SlotRegister(); Register slot_register = LoadDescriptor::SlotRegister();
DCHECK(vector_register.is(VectorLoadICDescriptor::VectorRegister())); DCHECK(vector_register.is(LoadWithVectorDescriptor::VectorRegister()));
DCHECK(slot_register.is(r3)); DCHECK(slot_register.is(r3));
AllowDeferredHandleDereference vector_structure_check; AllowDeferredHandleDereference vector_structure_check;
......
...@@ -2092,7 +2092,7 @@ LInstruction* LChunkBuilder::DoLoadGlobalGeneric(HLoadGlobalGeneric* instr) { ...@@ -2092,7 +2092,7 @@ LInstruction* LChunkBuilder::DoLoadGlobalGeneric(HLoadGlobalGeneric* instr) {
UseFixed(instr->global_object(), LoadDescriptor::ReceiverRegister()); UseFixed(instr->global_object(), LoadDescriptor::ReceiverRegister());
LOperand* vector = NULL; LOperand* vector = NULL;
if (instr->HasVectorAndSlot()) { if (instr->HasVectorAndSlot()) {
vector = FixedTemp(VectorLoadICDescriptor::VectorRegister()); vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
} }
LLoadGlobalGeneric* result = LLoadGlobalGeneric* result =
new (zone()) LLoadGlobalGeneric(context, global_object, vector); new (zone()) LLoadGlobalGeneric(context, global_object, vector);
...@@ -2141,7 +2141,7 @@ LInstruction* LChunkBuilder::DoLoadNamedGeneric(HLoadNamedGeneric* instr) { ...@@ -2141,7 +2141,7 @@ LInstruction* LChunkBuilder::DoLoadNamedGeneric(HLoadNamedGeneric* instr) {
UseFixed(instr->object(), LoadDescriptor::ReceiverRegister()); UseFixed(instr->object(), LoadDescriptor::ReceiverRegister());
LOperand* vector = NULL; LOperand* vector = NULL;
if (instr->HasVectorAndSlot()) { if (instr->HasVectorAndSlot()) {
vector = FixedTemp(VectorLoadICDescriptor::VectorRegister()); vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
} }
LInstruction* result = LInstruction* result =
...@@ -2213,7 +2213,7 @@ LInstruction* LChunkBuilder::DoLoadKeyedGeneric(HLoadKeyedGeneric* instr) { ...@@ -2213,7 +2213,7 @@ LInstruction* LChunkBuilder::DoLoadKeyedGeneric(HLoadKeyedGeneric* instr) {
LOperand* key = UseFixed(instr->key(), LoadDescriptor::NameRegister()); LOperand* key = UseFixed(instr->key(), LoadDescriptor::NameRegister());
LOperand* vector = NULL; LOperand* vector = NULL;
if (instr->HasVectorAndSlot()) { if (instr->HasVectorAndSlot()) {
vector = FixedTemp(VectorLoadICDescriptor::VectorRegister()); vector = FixedTemp(LoadWithVectorDescriptor::VectorRegister());
} }
LInstruction* result = DefineFixed( LInstruction* result = DefineFixed(
......
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