Commit b35aefd3 authored by bjaideep's avatar bjaideep Committed by Commit bot

PPC: Added macro functions for stfd[u],stfs[u],lfd[u],lfs[u]

Added macro functions to handle large offsets(>16bits) in StoreDoubleU/
LoadDoubleU/StoreSingle/StoreSingleU/LoadSingle/LoadSingleU.

R=joransiu@ca.ibm.com, jyan@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=
LOG=N

Review-Url: https://codereview.chromium.org/1962773002
Cr-Commit-Position: refs/heads/master@{#36118}
parent 779fce37
...@@ -1321,8 +1321,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1321,8 +1321,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kPPC_PushFrame: { case kPPC_PushFrame: {
int num_slots = i.InputInt32(1); int num_slots = i.InputInt32(1);
if (instr->InputAt(0)->IsDoubleRegister()) { if (instr->InputAt(0)->IsDoubleRegister()) {
__ stfdu(i.InputDoubleRegister(0), __ StoreDoubleU(i.InputDoubleRegister(0),
MemOperand(sp, -num_slots * kPointerSize)); MemOperand(sp, -num_slots * kPointerSize), r0);
} else { } else {
__ StorePU(i.InputRegister(0), __ StorePU(i.InputRegister(0),
MemOperand(sp, -num_slots * kPointerSize), r0); MemOperand(sp, -num_slots * kPointerSize), r0);
...@@ -1332,7 +1332,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1332,7 +1332,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kPPC_StoreToStackSlot: { case kPPC_StoreToStackSlot: {
int slot = i.InputInt32(1); int slot = i.InputInt32(1);
if (instr->InputAt(0)->IsDoubleRegister()) { if (instr->InputAt(0)->IsDoubleRegister()) {
__ stfd(i.InputDoubleRegister(0), MemOperand(sp, slot * kPointerSize)); __ StoreDouble(i.InputDoubleRegister(0),
MemOperand(sp, slot * kPointerSize), r0);
} else { } else {
__ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize), r0); __ StoreP(i.InputRegister(0), MemOperand(sp, slot * kPointerSize), r0);
} }
......
...@@ -4490,6 +4490,44 @@ void MacroAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem, ...@@ -4490,6 +4490,44 @@ void MacroAssembler::LoadDouble(DoubleRegister dst, const MemOperand& mem,
} }
} }
void MacroAssembler::LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
lfdux(dst, MemOperand(base, scratch));
} else {
lfdu(dst, mem);
}
}
void MacroAssembler::LoadSingle(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
lfsx(dst, MemOperand(base, scratch));
} else {
lfs(dst, mem);
}
}
void MacroAssembler::LoadSingleU(DoubleRegister dst, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
lfsux(dst, MemOperand(base, scratch));
} else {
lfsu(dst, mem);
}
}
void MacroAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem, void MacroAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem,
Register scratch) { Register scratch) {
...@@ -4504,6 +4542,45 @@ void MacroAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem, ...@@ -4504,6 +4542,45 @@ void MacroAssembler::StoreDouble(DoubleRegister src, const MemOperand& mem,
} }
} }
void MacroAssembler::StoreDoubleU(DoubleRegister src, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
stfdux(src, MemOperand(base, scratch));
} else {
stfdu(src, mem);
}
}
void MacroAssembler::StoreSingle(DoubleRegister src, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
stfsx(src, MemOperand(base, scratch));
} else {
stfs(src, mem);
}
}
void MacroAssembler::StoreSingleU(DoubleRegister src, const MemOperand& mem,
Register scratch) {
Register base = mem.ra();
int offset = mem.offset();
if (!is_int16(offset)) {
mov(scratch, Operand(offset));
stfsux(src, MemOperand(base, scratch));
} else {
stfsu(src, mem);
}
}
void MacroAssembler::TestJSArrayForAllocationMemento(Register receiver_reg, void MacroAssembler::TestJSArrayForAllocationMemento(Register receiver_reg,
Register scratch_reg, Register scratch_reg,
Register scratch2_reg, Register scratch2_reg,
......
...@@ -511,8 +511,25 @@ class MacroAssembler : public Assembler { ...@@ -511,8 +511,25 @@ class MacroAssembler : public Assembler {
void StoreRepresentation(Register src, const MemOperand& mem, void StoreRepresentation(Register src, const MemOperand& mem,
Representation r, Register scratch = no_reg); Representation r, Register scratch = no_reg);
void LoadDouble(DoubleRegister dst, const MemOperand& mem, Register scratch); void LoadDouble(DoubleRegister dst, const MemOperand& mem,
void StoreDouble(DoubleRegister src, const MemOperand& mem, Register scratch); Register scratch = no_reg);
void LoadDoubleU(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadSingle(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void LoadSingleU(DoubleRegister dst, const MemOperand& mem,
Register scratch = no_reg);
void StoreDouble(DoubleRegister src, const MemOperand& mem,
Register scratch = no_reg);
void StoreDoubleU(DoubleRegister src, const MemOperand& mem,
Register scratch = no_reg);
void StoreSingle(DoubleRegister src, const MemOperand& mem,
Register scratch = no_reg);
void StoreSingleU(DoubleRegister src, const MemOperand& mem,
Register scratch = no_reg);
// Move values between integer and floating point registers. // Move values between integer and floating point registers.
void MovIntToDouble(DoubleRegister dst, Register src, Register scratch); void MovIntToDouble(DoubleRegister dst, Register src, Register scratch);
......
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