Commit b30330c9 authored by Andreas Haas's avatar Andreas Haas Committed by Commit Bot

[mips][turbofan] Pass the slot index for the Peek instruction by operand

This is the implementation of crrev.com/c/866721 for mips and mips64.

Drive-by change: I made the slot index calculation on mips the same as
on mips64.

Original description:

At the moment the slot index is encoded in the opcode. This, however,
sets an upper limit the slot index which is lower than what we want to
have (i.e. < 512). With this change we pass the slot index as an
immediate operand, which does not impose limits on the value it
contains.

R=v8-mips-ports@googlegroups.com

Change-Id: I46219b07962eadd174f418cba1ea38b07f9b5e96
Reviewed-on: https://chromium-review.googlesource.com/866723
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Reviewed-by: 's avatarIvica Bogosavljevic <ivica.bogosavljevic@mips.com>
Cr-Commit-Position: refs/heads/master@{#50719}
parent 40eeaefb
...@@ -1650,7 +1650,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1650,7 +1650,8 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
} }
break; break;
case kMipsPeek: { case kMipsPeek: {
int reverse_slot = MiscField::decode(instr->opcode()); // The incoming value is 0-based, but we need a 1-based value.
int reverse_slot = i.InputInt32(0) + 1;
int offset = int offset =
FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot); FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
if (instr->OutputAt(0)->IsFPRegister()) { if (instr->OutputAt(0)->IsFPRegister()) {
......
...@@ -1209,7 +1209,6 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results, ...@@ -1209,7 +1209,6 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results,
int reverse_slot = 0; int reverse_slot = 0;
for (PushParameter output : *results) { for (PushParameter output : *results) {
if (!output.location.IsCallerFrameSlot()) continue; if (!output.location.IsCallerFrameSlot()) continue;
++reverse_slot;
// Skip any alignment holes in nodes. // Skip any alignment holes in nodes.
if (output.node != nullptr) { if (output.node != nullptr) {
DCHECK(!descriptor->IsCFunctionCall()); DCHECK(!descriptor->IsCFunctionCall());
...@@ -1218,13 +1217,10 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results, ...@@ -1218,13 +1217,10 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results,
} else if (output.location.GetType() == MachineType::Float64()) { } else if (output.location.GetType() == MachineType::Float64()) {
MarkAsFloat64(output.node); MarkAsFloat64(output.node);
} }
InstructionOperand result = g.DefineAsRegister(output.node); Emit(kMipsPeek, g.DefineAsRegister(output.node),
Emit(kMipsPeek | MiscField::encode(reverse_slot), result); g.UseImmediate(reverse_slot));
}
if (output.location.GetType() == MachineType::Float64()) {
// Float64 require an implicit second slot.
++reverse_slot;
} }
reverse_slot += output.location.GetSizeInPointers();
} }
} }
......
...@@ -1901,7 +1901,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( ...@@ -1901,7 +1901,7 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
break; break;
case kMips64Peek: { case kMips64Peek: {
// The incoming value is 0-based, but we need a 1-based value. // The incoming value is 0-based, but we need a 1-based value.
int reverse_slot = MiscField::decode(instr->opcode()) + 1; int reverse_slot = i.InputInt32(0) + 1;
int offset = int offset =
FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot); FrameSlotToFPOffset(frame()->GetTotalFrameSlotCount() - reverse_slot);
if (instr->OutputAt(0)->IsFPRegister()) { if (instr->OutputAt(0)->IsFPRegister()) {
......
...@@ -1699,8 +1699,8 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results, ...@@ -1699,8 +1699,8 @@ void InstructionSelector::EmitPrepareResults(ZoneVector<PushParameter>* results,
} else if (output.location.GetType() == MachineType::Float64()) { } else if (output.location.GetType() == MachineType::Float64()) {
MarkAsFloat64(output.node); MarkAsFloat64(output.node);
} }
InstructionOperand result = g.DefineAsRegister(output.node); Emit(kMips64Peek, g.DefineAsRegister(output.node),
Emit(kMips64Peek | MiscField::encode(reverse_slot), result); g.UseImmediate(reverse_slot));
} }
reverse_slot += output.location.GetSizeInPointers(); reverse_slot += output.location.GetSizeInPointers();
} }
......
...@@ -172,10 +172,6 @@ ...@@ -172,10 +172,6 @@
['arch == s390 or arch == s390x or arch == ppc or arch == ppc64', { ['arch == s390 or arch == s390x or arch == ppc or arch == ppc64', {
'test-multiple-return/*': [SKIP], 'test-multiple-return/*': [SKIP],
}], }],
# TODO(ahaas): Port multiple return values to ARM, MIPS, S390 and PPC
['arch == mips or arch == mips64 or arch == mipsel or arch == mips64el or arch == s390 or arch == s390x or arch == ppc or arch == ppc64', {
'test-multiple-return/ReturnLastValue*': [SKIP],
}],
############################################################################## ##############################################################################
['asan == True', { ['asan == True', {
# Skip tests not suitable for ASAN. # Skip tests not suitable for ASAN.
......
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