[mips64][liftoff] Fix shift instructions

Port 42e8c231

Because the shift amount may not a 5-bit or 6-bit value, remove the
DCHECK in shift operations like x86 and arm platforms;

Change-Id: I50e8f4662ced9eadcc4d867c5862077174619f1d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2509089Reviewed-by: Andreas Haas <ahaas@chromium.org>
Commit-Queue: Andreas Haas <ahaas@chromium.org>
Auto-Submit: Liu yu <liuyu@loongson.cn>
Cr-Commit-Position: refs/heads/master@{#70941}

src/wasm/baseline/mips64/liftoff-assembler-mips64.h

@@ -826,8 +826,7 @@ bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
   I32_SHIFTOP(name, instruction##v)                                     \
   void LiftoffAssembler::emit_i32_##name##i(Register dst, Register src, \
                                             int amount) {               \
-    DCHECK(is_uint5(amount));                                           \
-    instruction(dst, src, amount);                                      \
+    instruction(dst, src, amount & 31);                                 \
   }
 
 I32_SHIFTOP_I(shl, sll)
@@ -926,7 +925,7 @@ I64_BINOP_I(xor, Xor)
   I64_SHIFTOP(name, instruction##v)                                            \
   void LiftoffAssembler::emit_i64_##name##i(LiftoffRegister dst,               \
                                             LiftoffRegister src, int amount) { \
-    DCHECK(is_uint6(amount));                                                  \
+    amount &= 63;                                                              \
     if (amount < 32)                                                           \
       instruction(dst.gp(), src.gp(), amount);                                 \
     else                                                                       \