[wasm-simd][arm] Prototype f64x2.trunc

Prototype f64x2.trunc on ARM for both ARM v7 and ARM v8. ARM v8 has
support for vrintz, and for ARM v7 we fallback to runtime.

Since ARM v8 uses vrintz, which is the same instruction used for F64
trunc (scalar), wasm-compiler reuses the Float64RoundTruncate check.

Bug: v8:10553
Change-Id: I074d5b4172809915d4b37c59bd3b0dcbf9a45e1d
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2268357
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Reviewed-by: Deepti Gandluri <gdeepti@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68592}

src/codegen/external-reference.cc

@@ -299,6 +299,7 @@ FUNCTION_REFERENCE(wasm_word64_rol, wasm::word64_rol_wrapper)
 FUNCTION_REFERENCE(wasm_word64_ror, wasm::word64_ror_wrapper)
 FUNCTION_REFERENCE(wasm_f64x2_ceil, wasm::f64x2_ceil_wrapper)
 FUNCTION_REFERENCE(wasm_f64x2_floor, wasm::f64x2_floor_wrapper)
+FUNCTION_REFERENCE(wasm_f64x2_trunc, wasm::f64x2_trunc_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_ceil, wasm::f32x4_ceil_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_floor, wasm::f32x4_floor_wrapper)
 FUNCTION_REFERENCE(wasm_f32x4_trunc, wasm::f32x4_trunc_wrapper)

src/codegen/external-reference.h

@@ -208,6 +208,7 @@ class StatsCounter;
   V(wasm_word64_popcnt, "wasm::word64_popcnt")                                \
   V(wasm_f64x2_ceil, "wasm::f64x2_ceil_wrapper")                              \
   V(wasm_f64x2_floor, "wasm::f64x2_floor_wrapper")                            \
+  V(wasm_f64x2_trunc, "wasm::f64x2_trunc_wrapper")                            \
   V(wasm_f32x4_ceil, "wasm::f32x4_ceil_wrapper")                              \
   V(wasm_f32x4_floor, "wasm::f32x4_floor_wrapper")                            \
   V(wasm_f32x4_trunc, "wasm::f32x4_trunc_wrapper")                            \

src/compiler/backend/arm/code-generator-arm.cc

@@ -2051,6 +2051,14 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vrintm(dst.high(), src.high());
       break;
     }
+    case kArmF64x2Trunc: {
+      CpuFeatureScope scope(tasm(), ARMv8);
+      Simd128Register dst = i.OutputSimd128Register();
+      Simd128Register src = i.InputSimd128Register(0);
+      __ vrintz(dst.low(), src.low());
+      __ vrintz(dst.high(), src.high());
+      break;
+    }
     case kArmI64x2SplatI32Pair: {
       Simd128Register dst = i.OutputSimd128Register();
       __ vdup(Neon32, dst, i.InputRegister(0));

src/compiler/backend/arm/instruction-codes-arm.h

@@ -148,6 +148,7 @@ namespace compiler {
   V(ArmF64x2Pmax)                  \
   V(ArmF64x2Ceil)                  \
   V(ArmF64x2Floor)                 \
+  V(ArmF64x2Trunc)                 \
   V(ArmF32x4Splat)                 \
   V(ArmF32x4ExtractLane)           \
   V(ArmF32x4ReplaceLane)           \

src/compiler/backend/arm/instruction-scheduler-arm.cc

@@ -128,6 +128,7 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmF64x2Pmax:
     case kArmF64x2Ceil:
     case kArmF64x2Floor:
+    case kArmF64x2Trunc:
     case kArmF32x4Splat:
     case kArmF32x4ExtractLane:
     case kArmF32x4ReplaceLane:

src/compiler/backend/arm/instruction-selector-arm.cc

@@ -1498,6 +1498,7 @@ void InstructionSelector::VisitUint32Mod(Node* node) {
   V(Float64RoundTiesEven, kArmVrintnF64) \
   V(F64x2Ceil, kArmF64x2Ceil)            \
   V(F64x2Floor, kArmF64x2Floor)          \
+  V(F64x2Trunc, kArmF64x2Trunc)          \
   V(F32x4Ceil, kArmVrintpF32)            \
   V(F32x4Floor, kArmVrintmF32)           \
   V(F32x4Trunc, kArmVrintzF32)           \

src/compiler/backend/instruction-selector.cc

@@ -2695,12 +2695,12 @@ void InstructionSelector::VisitF64x2Pmax(Node* node) { UNIMPLEMENTED(); }
 #if !V8_TARGET_ARCH_ARM
 void InstructionSelector::VisitF64x2Ceil(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2Floor(Node* node) { UNIMPLEMENTED(); }
+void InstructionSelector::VisitF64x2Trunc(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Ceil(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Floor(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4Trunc(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF32x4NearestInt(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_ARM
-void InstructionSelector::VisitF64x2Trunc(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitF64x2NearestInt(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_S390X
         // && !V8_TARGET_ARCH_IA32

src/compiler/wasm-compiler.cc

@@ -4052,6 +4052,12 @@ Node* WasmGraphBuilder::BuildF64x2Floor(Node* input) {
   return BuildCFuncInstruction(ref, type, input);
 }
 
+Node* WasmGraphBuilder::BuildF64x2Trunc(Node* input) {
+  MachineType type = MachineType::Simd128();
+  ExternalReference ref = ExternalReference::wasm_f64x2_trunc();
+  return BuildCFuncInstruction(ref, type, input);
+}
+
 Node* WasmGraphBuilder::BuildF32x4Ceil(Node* input) {
   MachineType type = MachineType::Simd128();
   ExternalReference ref = ExternalReference::wasm_f32x4_ceil();
@@ -4247,6 +4253,10 @@ Node* WasmGraphBuilder::SimdOp(wasm::WasmOpcode opcode, Node* const* inputs) {
         return BuildF64x2Floor(inputs[0]);
       return graph()->NewNode(mcgraph()->machine()->F64x2Floor(), inputs[0]);
     case wasm::kExprF64x2Trunc:
+      // Architecture support for F64x2Trunc and Float64RoundTruncate is the
+      // same.
+      if (!mcgraph()->machine()->Float64RoundTruncate().IsSupported())
+        return BuildF64x2Trunc(inputs[0]);
       return graph()->NewNode(mcgraph()->machine()->F64x2Trunc(), inputs[0]);
     case wasm::kExprF64x2NearestInt:
       return graph()->NewNode(mcgraph()->machine()->F64x2NearestInt(),

src/compiler/wasm-compiler.h

@@ -560,6 +560,7 @@ class WasmGraphBuilder {
   // Wasm SIMD.
   Node* BuildF64x2Ceil(Node* input);
   Node* BuildF64x2Floor(Node* input);
+  Node* BuildF64x2Trunc(Node* input);
   Node* BuildF32x4Ceil(Node* input);
   Node* BuildF32x4Floor(Node* input);
   Node* BuildF32x4Trunc(Node* input);

src/wasm/wasm-external-refs.cc

@@ -419,6 +419,10 @@ void f64x2_floor_wrapper(Address data) {
   simd_float_round_wrapper<double, &floor>(data);
 }
 
+void f64x2_trunc_wrapper(Address data) {
+  simd_float_round_wrapper<double, &trunc>(data);
+}
+
 void f32x4_ceil_wrapper(Address data) {
   simd_float_round_wrapper<float, &ceilf>(data);
 }

src/wasm/wasm-external-refs.h

@@ -83,6 +83,8 @@ V8_EXPORT_PRIVATE void f64x2_ceil_wrapper(Address data);
 
 V8_EXPORT_PRIVATE void f64x2_floor_wrapper(Address data);
 
+V8_EXPORT_PRIVATE void f64x2_trunc_wrapper(Address data);
+
 V8_EXPORT_PRIVATE void f32x4_ceil_wrapper(Address data);
 
 V8_EXPORT_PRIVATE void f32x4_floor_wrapper(Address data);

test/cctest/wasm/test-run-wasm-simd.cc

@@ -1339,14 +1339,14 @@ WASM_SIMD_TEST_NO_LOWERING(F64x2Floor) {
   FLAG_SCOPE(wasm_simd_post_mvp);
   RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Floor, floor, true);
 }
-#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
-        // V8_TARGET_ARCH_ARM
-#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
+
 WASM_SIMD_TEST_NO_LOWERING(F64x2Trunc) {
   FLAG_SCOPE(wasm_simd_post_mvp);
   RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2Trunc, trunc, true);
 }
-
+#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X ||
+        // V8_TARGET_ARCH_ARM
+#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_S390X
 WASM_SIMD_TEST_NO_LOWERING(F64x2NearestInt) {
   FLAG_SCOPE(wasm_simd_post_mvp);
   RunF64x2UnOpTest(execution_tier, lower_simd, kExprF64x2NearestInt, nearbyint,