Commit afb31199 authored by mbrandy's avatar mbrandy Committed by Commit bot

PPC: Vector ICs: Like megamorphic keyed koads, use a dummy vector for stores

Port 9e7af9ef

Original commit message:
It's useful for the megamorphic keyed store case to not require a
vector and slot as input. Analogous to the load case, we have a dummy
one-ic-slot vector to aid. Since the only kind of MISS is for
megamorphic cache stub failures, we don't need the real vector.
The reason is that megamorphic cache stub failures don't result in any
change to the type feedback vector state.

R=mvstanton@chromium.org, dstence@us.ibm.com, michael_dawson@ca.ibm.com
BUG=

Review URL: https://codereview.chromium.org/1212493002

Cr-Commit-Position: refs/heads/master@{#29302}
parent 3efc54de
...@@ -430,9 +430,9 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) { ...@@ -430,9 +430,9 @@ void KeyedLoadIC::GenerateMegamorphic(MacroAssembler* masm) {
DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10)); DCHECK(!AreAliased(vector, slot, r7, r8, r9, r10));
Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast( Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
masm->isolate()->factory()->keyed_load_dummy_vector()); masm->isolate()->factory()->keyed_load_dummy_vector());
int int_slot = dummy_vector->GetIndex(FeedbackVectorICSlot(0)); int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
__ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex); __ LoadRoot(vector, Heap::kKeyedLoadDummyVectorRootIndex);
__ LoadSmiLiteral(slot, Smi::FromInt(int_slot)); __ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::LOAD_IC)); Code::ComputeHandlerFlags(Code::LOAD_IC));
...@@ -683,6 +683,20 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm, ...@@ -683,6 +683,20 @@ void KeyedStoreIC::GenerateMegamorphic(MacroAssembler* masm,
__ LoadP(r7, FieldMemOperand(key, HeapObject::kMapOffset)); __ LoadP(r7, FieldMemOperand(key, HeapObject::kMapOffset));
__ lbz(r7, FieldMemOperand(r7, Map::kInstanceTypeOffset)); __ lbz(r7, FieldMemOperand(r7, Map::kInstanceTypeOffset));
__ JumpIfNotUniqueNameInstanceType(r7, &slow); __ JumpIfNotUniqueNameInstanceType(r7, &slow);
if (FLAG_vector_stores) {
// The handlers in the stub cache expect a vector and slot. Since we won't
// change the IC from any downstream misses, a dummy vector can be used.
Register vector = VectorStoreICDescriptor::VectorRegister();
Register slot = VectorStoreICDescriptor::SlotRegister();
DCHECK(!AreAliased(vector, slot, r6, r7, r8, r9));
Handle<TypeFeedbackVector> dummy_vector = Handle<TypeFeedbackVector>::cast(
masm->isolate()->factory()->keyed_store_dummy_vector());
int slot_index = dummy_vector->GetIndex(FeedbackVectorICSlot(0));
__ LoadRoot(vector, Heap::kKeyedStoreDummyVectorRootIndex);
__ LoadSmiLiteral(slot, Smi::FromInt(slot_index));
}
Code::Flags flags = Code::RemoveTypeAndHolderFromFlags( Code::Flags flags = Code::RemoveTypeAndHolderFromFlags(
Code::ComputeHandlerFlags(Code::STORE_IC)); Code::ComputeHandlerFlags(Code::STORE_IC));
masm->isolate()->stub_cache()->GenerateProbe( masm->isolate()->stub_cache()->GenerateProbe(
......
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