Fix incorrect assert on ARM that assumed that coprocessor id was always zero. This

is hit in debug mode on non-EABI non-simulator ARM platforms.  Thanks to
richarjo@gmail.com for reporting.
Review URL: http://codereview.chromium.org/113299

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@1923 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

src/arm/assembler-arm.cc

@@ -211,6 +211,7 @@ enum {
   // Instruction bit masks
   RdMask     = 15 << 12,  // in str instruction
   CondMask   = 15 << 28,
+  CoprocessorMask = 15 << 8,
   OpCodeMask = 15 << 21,  // in data-processing instructions
   Imm24Mask  = (1 << 24) - 1,
   Off12Mask  = (1 << 12) - 1,
@@ -616,7 +617,8 @@ void Assembler::addrmod4(Instr instr, Register rn, RegList rl) {
 
 void Assembler::addrmod5(Instr instr, CRegister crd, const MemOperand& x) {
   // unindexed addressing is not encoded by this function
-  ASSERT((instr & ~(CondMask | P | U | N | W | L)) == (B27 | B26));
+  ASSERT_EQ((B27 | B26),
+            (instr & ~(CondMask | CoprocessorMask | P | U | N | W | L)));
   ASSERT(x.rn_.is_valid() && !x.rm_.is_valid());
   int am = x.am_;
   int offset_8 = x.offset_;