Commit aaa7c4c9 authored by Junliang Yan's avatar Junliang Yan Committed by Commit Bot

PPC/s390: remove dead code and fix compilation

R=joransiu@ca.ibm.com

Bug: 
Change-Id: I50f5ad99dc8bdd80c3fd9cce27db7bb728c24497
Reviewed-on: https://chromium-review.googlesource.com/806934Reviewed-by: 's avatarJoran Siu <joransiu@ca.ibm.com>
Commit-Queue: Junliang Yan <jyan@ca.ibm.com>
Cr-Commit-Position: refs/heads/master@{#49845}
parent faf8aae9
......@@ -2672,69 +2672,6 @@ void CodeGenerator::AssembleSwap(InstructionOperand* source,
}
return;
// Dispatch on the source and destination operand kinds. Not all
// combinations are possible.
if (source->IsRegister()) {
// Register-register.
Register temp = kScratchReg;
Register src = g.ToRegister(source);
if (destination->IsRegister()) {
Register dst = g.ToRegister(destination);
__ mr(temp, src);
__ mr(src, dst);
__ mr(dst, temp);
} else {
DCHECK(destination->IsStackSlot());
MemOperand dst = g.ToMemOperand(destination);
__ mr(temp, src);
__ LoadP(src, dst);
__ StoreP(temp, dst);
}
#if V8_TARGET_ARCH_PPC64
} else if (source->IsStackSlot() || source->IsFPStackSlot()) {
#else
} else if (source->IsStackSlot()) {
DCHECK(destination->IsStackSlot());
#endif
Register temp_0 = kScratchReg;
Register temp_1 = r0;
MemOperand src = g.ToMemOperand(source);
MemOperand dst = g.ToMemOperand(destination);
__ LoadP(temp_0, src);
__ LoadP(temp_1, dst);
__ StoreP(temp_0, dst);
__ StoreP(temp_1, src);
} else if (source->IsFPRegister()) {
DoubleRegister temp = kScratchDoubleReg;
DoubleRegister src = g.ToDoubleRegister(source);
if (destination->IsFPRegister()) {
DoubleRegister dst = g.ToDoubleRegister(destination);
__ fmr(temp, src);
__ fmr(src, dst);
__ fmr(dst, temp);
} else {
DCHECK(destination->IsFPStackSlot());
MemOperand dst = g.ToMemOperand(destination);
__ fmr(temp, src);
__ lfd(src, dst);
__ stfd(temp, dst);
}
#if !V8_TARGET_ARCH_PPC64
} else if (source->IsFPStackSlot()) {
DCHECK(destination->IsFPStackSlot());
DoubleRegister temp_0 = kScratchDoubleReg;
DoubleRegister temp_1 = d0;
MemOperand src = g.ToMemOperand(source);
MemOperand dst = g.ToMemOperand(destination);
__ lfd(temp_0, src);
__ lfd(temp_1, dst);
__ stfd(temp_0, dst);
__ stfd(temp_1, src);
#endif
} else {
// No other combinations are possible.
UNREACHABLE();
}
}
......
......@@ -773,7 +773,7 @@ Handle<HeapObject> RegExpMacroAssemblerS390::GetCode(Handle<String> source) {
// and the following use of that register.
__ lay(r2, MemOperand(r2, num_saved_registers_ * kIntSize));
for (int i = 0; i < num_saved_registers_;) {
if (false && i < num_saved_registers_ - 4) {
if ((false) && i < num_saved_registers_ - 4) {
// TODO(john.yan): Can be optimized by SIMD instructions
__ LoadMultipleP(r3, r6, register_location(i + 3));
if (mode_ == UC16) {
......
......@@ -4004,9 +4004,9 @@ EVALUATE(BXH) {
DECODE_RS_A_INSTRUCTION(r1, r3, b2, d2);
// r1_val is the first operand, r3_val is the increment
int32_t r1_val = r1 == 0 ? 0 : get_register(r1);
int32_t r3_val = r2 == 0 ? 0 : get_register(r3);
intptr_t b2_val = b2 == 0 ? 0 : get_register(b2);
int32_t r1_val = (r1 == 0) ? 0 : get_register(r1);
int32_t r3_val = (r3 == 0) ? 0 : get_register(r3);
intptr_t b2_val = (b2 == 0) ? 0 : get_register(b2);
intptr_t branch_address = b2_val + d2;
// increment r1_val
r1_val += r3_val;
......
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