Commit a9143207 authored by Milad Fa's avatar Milad Fa Committed by V8 LUCI CQ

S390 [simd][liftoff] Implement relaxed fp truncate

Changes for TF instruction selector will be pasted
in the CL comments and will get applied once all
relaxed opcodes have been implemented in codegen/liftoff.

Change-Id: I4f7e8263a8ae099e48034749846fadd82c6a7c49
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3723778Reviewed-by: 's avatarJunliang Yan <junyan@redhat.com>
Commit-Queue: Milad Farazmand <mfarazma@redhat.com>
Cr-Commit-Position: refs/heads/main@{#81413}
parent 00cf55dd
......@@ -2732,22 +2732,22 @@ void LiftoffAssembler::emit_i8x16_relaxed_swizzle(LiftoffRegister dst,
void LiftoffAssembler::emit_i32x4_relaxed_trunc_f32x4_s(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kRelaxedSimd, "emit_i32x4_relaxed_trunc_f32x4_s");
I32x4SConvertF32x4(dst.fp(), src.fp(), kScratchDoubleReg, r0);
}
void LiftoffAssembler::emit_i32x4_relaxed_trunc_f32x4_u(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kRelaxedSimd, "emit_i32x4_relaxed_trunc_f32x4_u");
I32x4UConvertF32x4(dst.fp(), src.fp(), kScratchDoubleReg, r0);
}
void LiftoffAssembler::emit_i32x4_relaxed_trunc_f64x2_s_zero(
LiftoffRegister dst, LiftoffRegister src) {
bailout(kRelaxedSimd, "emit_i32x4_relaxed_trunc_f64x2_s_zero");
emit_i32x4_trunc_sat_f64x2_s_zero(dst, src);
}
void LiftoffAssembler::emit_i32x4_relaxed_trunc_f64x2_u_zero(
LiftoffRegister dst, LiftoffRegister src) {
bailout(kRelaxedSimd, "emit_i32x4_relaxed_trunc_f64x2_u_zero");
emit_i32x4_trunc_sat_f64x2_u_zero(dst, src);
}
void LiftoffAssembler::emit_s128_relaxed_laneselect(LiftoffRegister dst,
......
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