Commit a6d9f423 authored by jyan's avatar jyan Committed by Commit bot

S390: [Atomics] Make Atomics.store a builtin using TF

Port 81cb8411

R=binji@chromium.org, joransiu@ca.ibm.com, bjaideep@ca.ibm.com, michael_dawson@ca.ibm.com, mbrandy@us.ibm.com

BUG=v8:4614
LOG=N

Review-Url: https://codereview.chromium.org/1948043002
Cr-Commit-Position: refs/heads/master@{#36039}
parent f07d2cdd
......@@ -1658,6 +1658,15 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
case kAtomicLoadWord32:
__ LoadlW(i.OutputRegister(), i.MemoryOperand());
break;
case kAtomicStoreWord8:
__ StoreByte(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
case kAtomicStoreWord16:
__ StoreHalfWord(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
case kAtomicStoreWord32:
__ StoreW(i.InputRegister(0), i.MemoryOperand(NULL, 1));
break;
default:
UNREACHABLE();
break;
......
......@@ -1768,6 +1768,37 @@ void InstructionSelector::VisitAtomicLoad(Node* node) {
g.DefineAsRegister(node), g.UseRegister(base), g.UseRegister(index));
}
void InstructionSelector::VisitAtomicStore(Node* node) {
MachineRepresentation rep = AtomicStoreRepresentationOf(node->op());
S390OperandGenerator g(this);
Node* base = node->InputAt(0);
Node* index = node->InputAt(1);
Node* value = node->InputAt(2);
ArchOpcode opcode = kArchNop;
switch (rep) {
case MachineRepresentation::kWord8:
opcode = kAtomicStoreWord8;
break;
case MachineRepresentation::kWord16:
opcode = kAtomicStoreWord16;
break;
case MachineRepresentation::kWord32:
opcode = kAtomicStoreWord32;
break;
default:
UNREACHABLE();
return;
}
InstructionOperand inputs[4];
size_t input_count = 0;
inputs[input_count++] = g.UseUniqueRegister(value);
inputs[input_count++] = g.UseUniqueRegister(base);
inputs[input_count++] = g.UseUniqueRegister(index);
Emit(opcode | AddressingModeField::encode(kMode_MRR), 0, nullptr, input_count,
inputs);
}
// static
MachineOperatorBuilder::Flags
InstructionSelector::SupportedMachineOperatorFlags() {
......
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