Commit a5551d92 authored by Clemens Hammacher's avatar Clemens Hammacher Committed by Commit Bot

[assembler] Avoid hiding of Register::bit method on arm64

On arm64, we had {RegisterBase::bit} (defined in assembler.h) and
{CPURegister::bit} (defined in assembler-arm.h). {CPURegister} inherits
from {RegisterBase}. The two methods methods have different
behaviour on the special {no_reg}, which is only relied on in very few
places.
This CL fixes these places to avoid the use of {no_reg}, and removes
the overwritten method.

R=mstarzinger@chromium.org
CC=​rodolph.perfetta@arm.com

Change-Id: I859cc0d4ffc48fae018ee262f3e5403774db87a8
Reviewed-on: https://chromium-review.googlesource.com/1042188Reviewed-by: 's avatarMichael Starzinger <mstarzinger@chromium.org>
Reviewed-by: 's avatarRodolph Perfetta <rodolph.perfetta%arm.com@gtempaccount.com>
Commit-Queue: Clemens Hammacher <clemensh@chromium.org>
Cr-Commit-Position: refs/heads/master@{#52977}
parent 405c1dc7
......@@ -124,10 +124,6 @@ class CPURegister : public RegisterBase<CPURegister, kRegAfterLast> {
}
RegisterType type() const { return reg_type_; }
RegList bit() const {
DCHECK(static_cast<size_t>(reg_code_) < (sizeof(RegList) * kBitsPerByte));
return IsValid() ? 1UL << reg_code_ : 0;
}
int SizeInBits() const {
DCHECK(IsValid());
return reg_size_;
......@@ -485,14 +481,11 @@ bool AreAliased(const CPURegister& reg1,
// same size, and are of the same type. The system stack pointer may be
// specified. Arguments set to NoReg are ignored, as are any subsequent
// arguments. At least one argument (reg1) must be valid (not NoCPUReg).
bool AreSameSizeAndType(const CPURegister& reg1,
const CPURegister& reg2,
const CPURegister& reg3 = NoCPUReg,
const CPURegister& reg4 = NoCPUReg,
const CPURegister& reg5 = NoCPUReg,
const CPURegister& reg6 = NoCPUReg,
const CPURegister& reg7 = NoCPUReg,
const CPURegister& reg8 = NoCPUReg);
bool AreSameSizeAndType(
const CPURegister& reg1, const CPURegister& reg2 = NoCPUReg,
const CPURegister& reg3 = NoCPUReg, const CPURegister& reg4 = NoCPUReg,
const CPURegister& reg5 = NoCPUReg, const CPURegister& reg6 = NoCPUReg,
const CPURegister& reg7 = NoCPUReg, const CPURegister& reg8 = NoCPUReg);
// AreSameFormat returns true if all of the specified VRegisters have the same
// vector format. Arguments set to NoVReg are ignored, as are any subsequent
......@@ -517,12 +510,12 @@ typedef VRegister Simd128Register;
// Lists of registers.
class CPURegList {
public:
explicit CPURegList(CPURegister reg1, CPURegister reg2 = NoCPUReg,
CPURegister reg3 = NoCPUReg, CPURegister reg4 = NoCPUReg)
: list_(reg1.bit() | reg2.bit() | reg3.bit() | reg4.bit()),
size_(reg1.SizeInBits()),
type_(reg1.type()) {
DCHECK(AreSameSizeAndType(reg1, reg2, reg3, reg4));
template <typename... CPURegisters>
explicit CPURegList(CPURegister reg0, CPURegisters... regs)
: list_(CPURegister::ListOf(reg0, regs...)),
size_(reg0.SizeInBits()),
type_(reg0.type()) {
DCHECK(AreSameSizeAndType(reg0, regs...));
DCHECK(IsValid());
}
......@@ -646,8 +639,8 @@ class CPURegList {
CPURegister::RegisterType type_;
bool IsValid() const {
const RegList kValidRegisters = 0x8000000ffffffff;
const RegList kValidVRegisters = 0x0000000ffffffff;
constexpr RegList kValidRegisters{0x8000000ffffffff};
constexpr RegList kValidVRegisters{0x0000000ffffffff};
switch (type_) {
case CPURegister::kRegister:
return (list_ & kValidRegisters) == list_;
......
......@@ -962,8 +962,8 @@ class RegisterBase {
}
template <RegisterCode reg_code>
static constexpr int bit() {
return 1 << code<reg_code>();
static constexpr RegList bit() {
return RegList{1} << code<reg_code>();
}
static SubType from_code(int code) {
......@@ -972,11 +972,18 @@ class RegisterBase {
return SubType{code};
}
// Constexpr version (pass registers as template parameters).
template <RegisterCode... reg_codes>
static constexpr RegList ListOf() {
return CombineRegLists(RegisterBase::bit<reg_codes>()...);
}
// Non-constexpr version (pass registers as method parameters).
template <typename... Register>
static RegList ListOf(Register... regs) {
return CombineRegLists(regs.bit()...);
}
bool is_valid() const { return reg_code_ != kCode_no_reg; }
int code() const {
......@@ -984,7 +991,7 @@ class RegisterBase {
return reg_code_;
}
int bit() const { return 1 << code(); }
RegList bit() const { return RegList{1} << code(); }
inline constexpr bool operator==(SubType other) const {
return reg_code_ == other.reg_code_;
......
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