Commit a4dbf43e authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd] Fix f32x4 f64x2 rounding opcodes

Match opcodes proposed in https://github.com/WebAssembly/simd/pull/127,
and also move them into the list of MVP opcodes.

Bug: v8:10553
Change-Id: I02d839002673ac4aad3f863579607aaa17a52338
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2240489Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#68311}
parent 935d9151
......@@ -421,10 +421,6 @@ bool IsJSCompatibleSignature(const FunctionSig* sig, const WasmFeatures&);
V(F32x4Div, 0xfde7, s_ss) \
V(F32x4Min, 0xfde8, s_ss) \
V(F32x4Max, 0xfde9, s_ss) \
V(F32x4Ceil, 0xfdda, s_s) \
V(F32x4Floor, 0xfddb, s_s) \
V(F32x4Trunc, 0xfddc, s_s) \
V(F32x4NearestInt, 0xfdde, s_s) \
V(F64x2Abs, 0xfdec, s_s) \
V(F64x2Neg, 0xfded, s_s) \
V(F64x2Sqrt, 0xfdef, s_s) \
......@@ -434,10 +430,6 @@ bool IsJSCompatibleSignature(const FunctionSig* sig, const WasmFeatures&);
V(F64x2Div, 0xfdf3, s_ss) \
V(F64x2Min, 0xfdf4, s_ss) \
V(F64x2Max, 0xfdf5, s_ss) \
V(F64x2Ceil, 0xfddf, s_s) \
V(F64x2Floor, 0xfde2, s_s) \
V(F64x2Trunc, 0xfdee, s_s) \
V(F64x2NearestInt, 0xfdbe, s_s) \
V(I32x4SConvertF32x4, 0xfdf8, s_s) \
V(I32x4UConvertF32x4, 0xfdf9, s_s) \
V(F32x4SConvertI32x4, 0xfdfa, s_s) \
......@@ -462,8 +454,8 @@ bool IsJSCompatibleSignature(const FunctionSig* sig, const WasmFeatures&);
V(I64x2GeU, 0xfdd0, s_ss) \
V(I64x2MinS, 0xfdd6, s_ss) \
V(I64x2MinU, 0xfdd7, s_ss) \
V(I64x2MaxS, 0xfdd8, s_ss) \
V(I64x2MaxU, 0xfdd9, s_ss) \
V(I64x2MaxS, 0xfde2, s_ss) \
V(I64x2MaxU, 0xfdee, s_ss) \
V(F32x4Qfma, 0xfdfc, s_sss) \
V(F32x4Qfms, 0xfdfd, s_sss) \
V(F64x2Qfma, 0xfdfe, s_sss) \
......@@ -475,8 +467,16 @@ bool IsJSCompatibleSignature(const FunctionSig* sig, const WasmFeatures&);
V(F32x4RecipSqrtApprox, 0xfdba, s_s) \
V(F32x4Pmin, 0xfdea, s_ss) \
V(F32x4Pmax, 0xfdeb, s_ss) \
V(F32x4Ceil, 0xfdd8, s_s) \
V(F32x4Floor, 0xfdd9, s_s) \
V(F32x4Trunc, 0xfdda, s_s) \
V(F32x4NearestInt, 0xfddb, s_s) \
V(F64x2Pmin, 0xfdf6, s_ss) \
V(F64x2Pmax, 0xfdf7, s_ss)
V(F64x2Pmax, 0xfdf7, s_ss) \
V(F64x2Ceil, 0xfddc, s_s) \
V(F64x2Floor, 0xfddd, s_s) \
V(F64x2Trunc, 0xfdde, s_s) \
V(F64x2NearestInt, 0xfddf, s_s)
#define FOREACH_SIMD_1_OPERAND_1_PARAM_OPCODE(V) \
V(I8x16ExtractLaneS, 0xfd15, _) \
......
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