[wasm-simd][arm] Implement i64x2 signed compares

Bug: v8:11415
Change-Id: I8ad0aab2c1ac89ec66779b44542833c3a4eb96fb
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2693323Reviewed-by: Bill Budge <bbudge@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72789}

src/compiler/backend/arm/code-generator-arm.cc

@@ -2452,6 +2452,21 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
       __ vmvn(dst, dst);
       break;
     }
+    case kArmI64x2GtS: {
+      Simd128Register dst = i.OutputSimd128Register();
+      __ vqsub(NeonS64, dst, i.InputSimd128Register(1),
+               i.InputSimd128Register(0));
+      __ vshr(NeonS64, dst, dst, 63);
+      break;
+    }
+    case kArmI64x2GeS: {
+      Simd128Register dst = i.OutputSimd128Register();
+      __ vqsub(NeonS64, dst, i.InputSimd128Register(0),
+               i.InputSimd128Register(1));
+      __ vshr(NeonS64, dst, dst, 63);
+      __ vmvn(dst, dst);
+      break;
+    }
     case kArmI32x4Eq: {
       __ vceq(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
               i.InputSimd128Register(1));

src/compiler/backend/arm/instruction-codes-arm.h

@@ -193,6 +193,8 @@ namespace compiler {
   V(ArmI64x2BitMask)               \
   V(ArmI64x2Eq)                    \
   V(ArmI64x2Ne)                    \
+  V(ArmI64x2GtS)                   \
+  V(ArmI64x2GeS)                   \
   V(ArmI64x2SConvertI32x4Low)      \
   V(ArmI64x2SConvertI32x4High)     \
   V(ArmI64x2UConvertI32x4Low)      \

src/compiler/backend/arm/instruction-scheduler-arm.cc

@@ -173,6 +173,8 @@ int InstructionScheduler::GetTargetInstructionFlags(
     case kArmI64x2BitMask:
     case kArmI64x2Eq:
     case kArmI64x2Ne:
+    case kArmI64x2GtS:
+    case kArmI64x2GeS:
     case kArmI64x2SConvertI32x4Low:
     case kArmI64x2SConvertI32x4High:
     case kArmI64x2UConvertI32x4Low:

src/compiler/backend/arm/instruction-selector-arm.cc

@@ -2648,6 +2648,8 @@ void InstructionSelector::VisitWord32AtomicPairCompareExchange(Node* node) {
   V(I32x4Eq, kArmI32x4Eq)                             \
   V(I64x2Eq, kArmI64x2Eq)                             \
   V(I64x2Ne, kArmI64x2Ne)                             \
+  V(I64x2GtS, kArmI64x2GtS)                           \
+  V(I64x2GeS, kArmI64x2GeS)                           \
   V(I32x4Ne, kArmI32x4Ne)                             \
   V(I32x4GtS, kArmI32x4GtS)                           \
   V(I32x4GeS, kArmI32x4GeS)                           \

src/compiler/backend/instruction-selector.cc

@@ -2801,11 +2801,6 @@ void InstructionSelector::VisitI32x4WidenI8x16S(Node* node) { UNIMPLEMENTED(); }
 void InstructionSelector::VisitI32x4WidenI8x16U(Node* node) { UNIMPLEMENTED(); }
 #endif  // !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64
 
-#if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_IA32
-void InstructionSelector::VisitI64x2GtS(Node* node) { UNIMPLEMENTED(); }
-void InstructionSelector::VisitI64x2GeS(Node* node) { UNIMPLEMENTED(); }
-#endif  //! V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_ARM64 && !V8_TARGET_ARCH_IA32
-
 // TODO(v8:11416) Prototyping i64x2.abs.
 #if !V8_TARGET_ARCH_X64 && !V8_TARGET_ARCH_IA32 && !V8_TARGET_ARCH_ARM64
 void InstructionSelector::VisitI64x2Abs(Node* node) { UNIMPLEMENTED(); }

test/cctest/wasm/test-run-wasm-simd.cc

@@ -1049,7 +1049,6 @@ WASM_SIMD_TEST_NO_LOWERING(I64x2Ne) {
   RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2Ne, NotEqual);
 }
 
-#if V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_IA32
 WASM_SIMD_TEST_NO_LOWERING(I64x2LtS) {
   RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2LtS, Less);
 }
@@ -1065,7 +1064,6 @@ WASM_SIMD_TEST_NO_LOWERING(I64x2GtS) {
 WASM_SIMD_TEST_NO_LOWERING(I64x2GeS) {
   RunI64x2BinOpTest(execution_tier, lower_simd, kExprI64x2GeS, GreaterEqual);
 }
-#endif  // V8_TARGET_ARCH_X64 || V8_TARGET_ARCH_ARM64 || V8_TARGET_ARCH_IA32
 
 WASM_SIMD_TEST(F64x2Splat) {
   WasmRunner<int32_t, double> r(execution_tier, lower_simd);