Commit 9d3f3545 authored by Ng Zhi An's avatar Ng Zhi An Committed by Commit Bot

[wasm-simd][ia32][x64] Fix swizzle with constant masks

We optimized swizzle with constant mask, but failed to actually swizzle
using the masks...

Bug: v8:10992
Change-Id: If655fdad1e17e92b62e8a2eaabbf1f8d82e4d5e4
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2822951Reviewed-by: 's avatarDeepti Gandluri <gdeepti@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#73943}
parent 3844a6bd
......@@ -913,7 +913,7 @@ void TurboAssembler::I8x16Swizzle(XMMRegister dst, XMMRegister src,
XMMRegister mask, XMMRegister scratch,
Register tmp, bool omit_add) {
if (omit_add) {
Pshufb(dst, src, scratch);
Pshufb(dst, src, mask);
return;
}
......
......@@ -2355,7 +2355,7 @@ void TurboAssembler::I8x16Swizzle(XMMRegister dst, XMMRegister src,
if (omit_add) {
// We have determined that the indices are immediates, and they are either
// within bounds, or the top bit is set, so we can omit the add.
Pshufb(dst, src, kScratchDoubleReg);
Pshufb(dst, src, mask);
return;
}
......
......@@ -2226,6 +2226,30 @@ WASM_SIMD_TEST(I8x16Swizzle) {
CHECK_EQ(ReadLittleEndianValue<uint8_t>(&dst[i]), si.expected[i]);
}
}
{
// We have an optimization for constant indices, test this case.
for (SwizzleTestArgs si : swizzle_test_vector) {
WasmRunner<int32_t> r(execution_tier, lower_simd);
uint8_t* dst = r.builder().AddGlobal<uint8_t>(kWasmS128);
uint8_t* src0 = r.builder().AddGlobal<uint8_t>(kWasmS128);
BUILD(r,
WASM_GLOBAL_SET(
0, WASM_SIMD_BINOP(kExprI8x16Swizzle, WASM_GLOBAL_GET(1),
WASM_SIMD_CONSTANT(si.indices))),
WASM_ONE);
for (int i = 0; i < kSimd128Size; i++) {
WriteLittleEndianValue<uint8_t>(&src0[i], si.input[i]);
}
CHECK_EQ(1, r.Call());
for (int i = 0; i < kSimd128Size; i++) {
CHECK_EQ(ReadLittleEndianValue<uint8_t>(&dst[i]), si.expected[i]);
}
}
}
}
// Combine 3 shuffles a, b, and c by applying both a and b and then applying c
......
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