Commit 9cb7e571 authored by Zhi An Ng's avatar Zhi An Ng Committed by Commit Bot

[wasm-simd][liftoff][arm64][arm] Implement i64x2 widen i32x4

Implement these 4 instructions for arm64 and arm Liftoff:
- i64x2.widen_low_i32x4_s
- i64x2.widen_high_i32x4_s
- i64x2.widen_low_i32x4_u
- i64x2.widen_high_i32x4_u

Drive-by cleanup of the test case to make it clearer that we are
checking against an unsigned result.

Bug: v8:10972
Change-Id: I509a8df8a6f2109417ad5aaaa0324ced50bdc84a
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2626713Reviewed-by: 's avatarClemens Backes <clemensb@chromium.org>
Commit-Queue: Zhi An Ng <zhin@chromium.org>
Cr-Commit-Position: refs/heads/master@{#72074}
parent 23816fcb
......@@ -2895,22 +2895,22 @@ void LiftoffAssembler::emit_i64x2_bitmask(LiftoffRegister dst,
void LiftoffAssembler::emit_i64x2_sconvert_i32x4_low(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_sconvert_i32x4_low");
vmovl(NeonS32, liftoff::GetSimd128Register(dst), src.low_fp());
}
void LiftoffAssembler::emit_i64x2_sconvert_i32x4_high(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_sconvert_i32x4_high");
vmovl(NeonS32, liftoff::GetSimd128Register(dst), src.high_fp());
}
void LiftoffAssembler::emit_i64x2_uconvert_i32x4_low(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_uconvert_i32x4_low");
vmovl(NeonU32, liftoff::GetSimd128Register(dst), src.low_fp());
}
void LiftoffAssembler::emit_i64x2_uconvert_i32x4_high(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_uconvert_i32x4_high");
vmovl(NeonU32, liftoff::GetSimd128Register(dst), src.high_fp());
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
......
......@@ -2019,22 +2019,22 @@ void LiftoffAssembler::emit_i64x2_bitmask(LiftoffRegister dst,
void LiftoffAssembler::emit_i64x2_sconvert_i32x4_low(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_sconvert_i32x4_low");
Sxtl(dst.fp().V2D(), src.fp().V2S());
}
void LiftoffAssembler::emit_i64x2_sconvert_i32x4_high(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_sconvert_i32x4_high");
Sxtl2(dst.fp().V2D(), src.fp().V4S());
}
void LiftoffAssembler::emit_i64x2_uconvert_i32x4_low(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_uconvert_i32x4_low");
Uxtl(dst.fp().V2D(), src.fp().V2S());
}
void LiftoffAssembler::emit_i64x2_uconvert_i32x4_high(LiftoffRegister dst,
LiftoffRegister src) {
bailout(kSimd, "i64x2_uconvert_i32x4_high");
Uxtl2(dst.fp().V2D(), src.fp().V4S());
}
void LiftoffAssembler::emit_i32x4_splat(LiftoffRegister dst,
......
......@@ -1814,8 +1814,8 @@ WASM_SIMD_TEST_NO_LOWERING(I64x2ConvertI32x4) {
// Create four output vectors to hold signed and unsigned results.
int64_t* g0 = r.builder().AddGlobal<int64_t>(kWasmS128);
int64_t* g1 = r.builder().AddGlobal<int64_t>(kWasmS128);
int64_t* g2 = r.builder().AddGlobal<int64_t>(kWasmS128);
int64_t* g3 = r.builder().AddGlobal<int64_t>(kWasmS128);
uint64_t* g2 = r.builder().AddGlobal<uint64_t>(kWasmS128);
uint64_t* g3 = r.builder().AddGlobal<uint64_t>(kWasmS128);
// Build fn to splat test value, perform conversions, and write the results.
byte value = 0;
byte temp1 = r.AllocateLocal(kWasmS128);
......@@ -1833,12 +1833,13 @@ WASM_SIMD_TEST_NO_LOWERING(I64x2ConvertI32x4) {
FOR_INT32_INPUTS(x) {
r.Call(x);
int64_t expected_signed = static_cast<int64_t>(x);
int64_t expected_unsigned = static_cast<int64_t>(static_cast<uint32_t>(x));
uint64_t expected_unsigned =
static_cast<uint64_t>(static_cast<uint32_t>(x));
for (int i = 0; i < 2; i++) {
CHECK_EQ(expected_signed, ReadLittleEndianValue<int64_t>(&g0[i]));
CHECK_EQ(expected_signed, ReadLittleEndianValue<int64_t>(&g1[i]));
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int64_t>(&g2[i]));
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<int64_t>(&g3[i]));
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<uint64_t>(&g2[i]));
CHECK_EQ(expected_unsigned, ReadLittleEndianValue<uint64_t>(&g3[i]));
}
}
}
......
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