Commit 9c3e94b2 authored by Clemens Backes's avatar Clemens Backes Committed by Commit Bot

[Liftoff] Remove unused return value

R=ahaas@chromium.org

Bug: v8:9919
Change-Id: I0739cfaa00abde3ce81831aa235c835277ea942c
Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/1893338Reviewed-by: 's avatarAndreas Haas <ahaas@chromium.org>
Commit-Queue: Clemens Backes <clemensb@chromium.org>
Cr-Commit-Position: refs/heads/master@{#64686}
parent a3fdb041
...@@ -747,15 +747,13 @@ FP64_UNOP(f64_sqrt, vsqrt) ...@@ -747,15 +747,13 @@ FP64_UNOP(f64_sqrt, vsqrt)
#undef FP64_UNOP #undef FP64_UNOP
#undef FP64_BINOP #undef FP64_BINOP
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
clz(dst, src); clz(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
rbit(dst, src); rbit(dst, src);
clz(dst, dst); clz(dst, dst);
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
...@@ -563,15 +563,13 @@ FP64_UNOP(f64_sqrt, Fsqrt) ...@@ -563,15 +563,13 @@ FP64_UNOP(f64_sqrt, Fsqrt)
#undef I64_SHIFTOP #undef I64_SHIFTOP
#undef I64_SHIFTOP_I #undef I64_SHIFTOP_I
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
Clz(dst.W(), src.W()); Clz(dst.W(), src.W());
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
Rbit(dst.W(), src.W()); Rbit(dst.W(), src.W());
Clz(dst.W(), dst.W()); Clz(dst.W(), dst.W());
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
...@@ -777,14 +777,12 @@ void LiftoffAssembler::emit_i32_shr(Register dst, Register src, int amount) { ...@@ -777,14 +777,12 @@ void LiftoffAssembler::emit_i32_shr(Register dst, Register src, int amount) {
shr(dst, amount); shr(dst, amount);
} }
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
Lzcnt(dst, src); Lzcnt(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
Tzcnt(dst, src); Tzcnt(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
...@@ -417,8 +417,8 @@ class LiftoffAssembler : public TurboAssembler { ...@@ -417,8 +417,8 @@ class LiftoffAssembler : public TurboAssembler {
inline void emit_i32_shr(Register dst, Register src, int amount); inline void emit_i32_shr(Register dst, Register src, int amount);
// i32 unops. // i32 unops.
inline bool emit_i32_clz(Register dst, Register src); inline void emit_i32_clz(Register dst, Register src);
inline bool emit_i32_ctz(Register dst, Register src); inline void emit_i32_ctz(Register dst, Register src);
inline bool emit_i32_popcnt(Register dst, Register src); inline bool emit_i32_popcnt(Register dst, Register src);
// i64 binops. // i64 binops.
......
...@@ -706,14 +706,12 @@ I32_BINOP_I(xor, Xor) ...@@ -706,14 +706,12 @@ I32_BINOP_I(xor, Xor)
#undef I32_BINOP_I #undef I32_BINOP_I
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
TurboAssembler::Clz(dst, src); TurboAssembler::Clz(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
TurboAssembler::Ctz(dst, src); TurboAssembler::Ctz(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
...@@ -626,14 +626,12 @@ I32_BINOP_I(xor, Xor) ...@@ -626,14 +626,12 @@ I32_BINOP_I(xor, Xor)
#undef I32_BINOP_I #undef I32_BINOP_I
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
TurboAssembler::Clz(dst, src); TurboAssembler::Clz(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
TurboAssembler::Ctz(dst, src); TurboAssembler::Ctz(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
...@@ -740,14 +740,12 @@ void LiftoffAssembler::emit_i32_shr(Register dst, Register src, int amount) { ...@@ -740,14 +740,12 @@ void LiftoffAssembler::emit_i32_shr(Register dst, Register src, int amount) {
shrl(dst, Immediate(amount)); shrl(dst, Immediate(amount));
} }
bool LiftoffAssembler::emit_i32_clz(Register dst, Register src) { void LiftoffAssembler::emit_i32_clz(Register dst, Register src) {
Lzcntl(dst, src); Lzcntl(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_ctz(Register dst, Register src) { void LiftoffAssembler::emit_i32_ctz(Register dst, Register src) {
Tzcntl(dst, src); Tzcntl(dst, src);
return true;
} }
bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) { bool LiftoffAssembler::emit_i32_popcnt(Register dst, Register src) {
......
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